Fault modeling and parametric fault detection in analog VLSI circuits using discretization - Baldev Raj; G. M. Bhat; Sandeep Thakur (International Journal of Electrical and Computer Engineering (IJECE), 2019)
In this article we describe new model for determination of fault in circuit and also we provide detailed analysis of tolerance of circuit, which is considered one of the important parameter while designing the circuit. We have done mathematical analysis to provide strong base for our model and also done simulation for the same. This article describes detailed analysis of parametric fault in analog VLSI circuit. The model is tested for different frequencies for compactness and its flexibility. The tolerance analysis is also done for this purpose. All the simulation are done in MATLAB software.