Chirplet signal design by FPGA - Mohammed Jawad Al-Dujaili; Aws Majeed Al-Awadi (International Journal of Electrical and Computer Engineering (IJECE), 2021)
The ever-expanding growth of the electronics and communications industries present new challenges for researchers. One of these challenges is the generation of the required bandwidth signal over a specific time frame that is used in a variety of contexts, particularly radar systems. To improve the range resolution in the radar along with better SNR, it is necessary to reduce the signal bandwidth and increase the peak power. There are some restrictions for narrowband signals like power limitation, pulse shaping, and the production of unwanted harmonics. So as a solution pulse compression techniques are suggested. Pulse compression is a process that modulating the transmitted pulse to achieve a wideband signal and then at the receiver, the received signal correlates with the transmitted pulse to achieve narrowband representations of data. Chirp is the most common signal used in pulse compression. The chirp signal is produced using linear frequency modulation. In this study, we attempted to add an amplitude modulation to the chirp signal and evaluate its performance by implementation on FPGA. The outcome signal is called chirplet and simulation will show that it enhance target detection and image quality in imaging radars like SAR.