PURWARUPA MIKROPROSESOR BERBASIS FPGA ALTERA EPF10K10 DENGAN DESKRIPSI VHDL - Agfianto Eko Putra; Arsyad Muhammad Fajri (Seminar Nasional Informatika (SEMNASIF), 2008)
It has been designed and implemented an FPGA-based microprocessor prototype using Altera EPF10K10 and VHDL description then compiled and simulate using MAX+Plus II software. The microprocessor prototype is implementing using the Wizard A-01 development board and its assembly program stored in ROM. To decode and execute the instruction, it used Control Unit, which will send control signal to other components. The 16 instructions is implementing in this microprocessor prototype. This microprocessor prototype has 8-bit data bus and 4-bit address bus, implemented using 375 logic cells, operating at 14.72 MHz clock (maximum) and 3.68 MIPS.