An active two-stage class-J power amplifier design for smart grid’s 5G wireless networks - Sridhar, Nagisetty; Senthilpari, Chinnaiyan; Roslee, Mardeni; Yong, Wong Hin (International Journal of Reconfigurable and Embedded Systems (IJRES), 2024)
The wireless communication networks in the smart grid’s advanced metering infrastructure (AMI) applications need 5G technology to support large data transmission efficiently. As the 5G wireless communication network’s overall bandwidth (BW) and efficiency depend on its power amplifier (PA), in this work, a two-stage class-J power amplifier’s design methodology that operates at 3.5 GHz centre frequency by utilizing the CGH40010F model gallium nitride (GaN) transistor is presented. The proposed design methodology involves proper designing of input, output, and interstage matching networks to achieve class-J operation with improved power gain over desired BW using the advanced design system (ADS) electronic design automation (EDA) tool and estimating its integration feasibility through active element-based design approach using the Mentor Graphics EDA tool. The proposed PA provides 54% drain efficiency (D.E), 53% power added efficiency (PAE) with a small signal gain of 27 dB at 3.5 GHz and 41 dBm power output with 21 dB of improved power gain across a BW of around 400 MHz using 28 V power supply into 50 Ω load. By replacing the two-stage PA's passive elements with active elements, its layout size is estimated to be (15.5×29.2) μm2 . The results of the proposed PA exhibit its integration feasibility and suitability for the smart grid’s 5G wireless networks.