SOC integration for video processing application - Chan Boon Cheng; Asral Bahari Jambek (Institute of Advanced Engineering and Science, 2019)
Video processing is an additional system that can improve the functionality of video surveillance. Integration of a simple video processing system into a complete camera system with a field-programmable gate array (FPGA) is an important step for research, to further improve the tracking process. This paper presents the integration of greyscale conversion into a complete camera system using Nios II software build tools for Eclipse. The camera system architecture is designed using the Nios II soft-core embedded processor from Altera. The proposed greyscale conversion system is designed using the C programming language in Eclipse. Parts of the architecture design in the camera system are important if greyscale conversion is to take place in the processing, such as synchronous dynamic random-access memory (SDRAM) and a video decoder driver. The image or video is captured using a Terasic TRDB-D5M camera and the data are converted to RGB format using the video decoder driver. The converted data are shown in binary format and the greyscale conversion system extracts and processes the data. The processed data are stored in the SDRAM before being sent to a VGA monitor. The camera system and greyscale conversion system were developed using the Altera DE2-70 development platform. The data from the video decoder driver and SDRAM were examined to confirm that the data conversion matched greyscale conversion formulae. The converted data in the SDRAM correctly displayed the greyscale image on a VGA monitor.