PERANCANGAN MIXER UP-CONVERSION CMOS UNTUK RANGKAIAN RF TERINTEGRASI - Susilawati, Cecilia (Jurnal Teknik Elektro, 2008)
The design, analysis and implementation of a high frequency 1-3GHz tunable pure NMOSQuadrature Up-Conversion mixer topology are presented. The mixer is implemented in adeep submicron 0,25 Î¼m CMOS process technology. Utilizing an off-chip tunable inductorachieves tunable range of frequency. Various passive components had been incorporated inits circuitry to increase the linearity of the topology. The mixer, which is a configuration of abalanced modulator, is composed from a Parallel Structure Low Voltage Multipliertopology, a High Gain Phase Shifting network and a Differential Cascade amplificationstage at the output. Various topology of four quadrant multiplier, biased in different regionof operation has been simulated and analyzed. The utilized topology requires fewer amountof stacked transistors, thus reducing the voltage headroom requirement of the circuitry. Theproposed high gain phase shifter relaxes the requirement of cascading several stages oflimiting amplifier at the output. Operating from a power supply of 2.0V, it consumes 150mWof power, with an OIP3 of 0dBm and 1dB compression level of 4.6dB.Keywords: Balanced Modulator, CMOS analog integrated circuit, Mixers, Phase shifters,RFIC