A level shift carrier based SPWM for reduced switch 5-level multilevel inverter topology - Nagarajappa, Champa Patanegere; Deshpande, Abhay Anandarao (Institute of Advanced Engineering and Science, 2024)
Multilevel inverters (MLI) seek attention from many researchers these days for high/medium power industrial applications because their output power quality is better than 2-level inverters. This research work presents a detailed comparative analysis of multicarrier level shift (LSPWM) technique implemented on five level conventional and modified multilevel inverters in MATLAB/Simulink software. With the aim of decreasing number of gate drives, switching devices, and DC sources there is a greater focus on emerging multilevel topologies, even though majority of traditional topologies are employed in important application. MLIs have bright future in industry-focused applications, but their size, cost, device count, and switching complexity have hindered their commercial acceptance. Researchers are always creating next generation topologies, or reducing the components and switches used in (RSC) MLIs, to illustrate the shortcomings of MLIs. Conventional five level inverter uses eight semiconductor switches, eight driver circuit and suffers from switching complexity while the proposed symmetrical 5-level smart MLI topology offers reduced quantity of switching elements, gate driver circuits, low cost, space requirement, low dv/dt stress, low switching losses over the traditional topology. The effect of % output harmonic contents are analyzed with phase-disposition and phase-opposition disposition technique for different loads.