Enhanced global navigation satellite system signal processing using field programmable gate array and system-on-chip based software receivers - Kh, Chetna Devi; Rao, Malode Vishwanatha Panduranga (Institute of Advanced Engineering and Science, 2025)
This paper presents a new approach to improving global navigation satellite system (GNSS) signal processing by using baseband processing techniques on field-programmable gate array (FPGA) platforms and a system-on-chip (SoC)-based GNSS software receiver. By leveraging the flexibility and computational power of FPGAs and the integration capabilities of SoC platforms, the method significantly enhances signal acquisition, tracking accuracy, and overall system performance. The integration of the ADFMCOMMS3-EBZ RF front end with the Zynq 7000 SoC board, along with high-speed parallel I/O and serial peripheral interface (SPI) for data management and configuration, enables efficient processing of high-speed signals. The study also explores wavelet transform techniques, such as the discrete wavelet transform (DWT), to improve filtering and noise reduction in GNSS signals. The results show that the proposed baseband processing algorithm for GNSS software-defined radio (SDR) reduces acquisition time and enhances tracking accuracy compared to traditional personal computer (PC)-based systems. Additionally, the SoC-based receiver is more energy-efficient and uses fewer resources. Comparative analysis shows that the proposed method provides more received samples, fewer dropped samples, and a lower data loss rate, confirming its effectiveness in boosting GNSS signal processing reliability and efficiency.