Study and Analysis of PWM with DC-DC Converter for Inverting Buck-Boost Inverter Topology - Gaber, Rajaa Khalaf; Shneen, Salam Waley; Jiaad, Suaad Makki (Association for Scientific Computing Electronics and Engineering (ASCEE), 2025)
The simulation aims to study and analyze the effect of the duty cycle on the output voltage and signal reflection. This type of simulation is important for many practical applications of inverter boost converters, such as renewable energy systems or portable electronics. A voltage converter is being developed to generate a negative voltage output, i.e., it has the ability to invert the output signal. The converter's input is connected to a DC voltage source, and is intended to generate a higher or lower voltage, depending on the application requirements, while maintaining the inverting output signal. This converter is used in many fields, most notably those powered by batteries, such as portable devices, where the required voltage varies depending on the load. Converters regulate and provide a stable and suitable voltage for the batteries. A study and analysis of these converters will address these challenges by building and designing a simulation model to generate a voltage suitable for covering the load or charging the batteries, operating efficiently and reliably under various operating conditions. Its effectiveness can be verified through proposed tests covering operating conditions suitable for real-time operation. The first contribution is to verify the possibility of changing the converter output signal to the same value as the converter output voltage during the pulse generator duty cycle (50%). The second contribution is to verify the possibility of increasing the value of the converter output voltage in the pulse generator duty cycle (70%) or decreasing the value of the converter output voltage in the pulse generator duty cycle (20%). The results demonstrated the effectiveness of the proposed model and the possibility of changing the output voltage value with changing the output signal.