Reduction of Switches and DC Sources in Cascaded Multilevel Inverter - N. Devarajan; A. Reena (Institute of Advanced Engineering and Science, 2015)
Harmonics and increasing number of switches and DC sources for increasing level is the major issue in the cascaded multilevel inverter for the application of medium and high voltage power system applications. In this paper several new techniques are used to reduce the switches and DC sources, which overcome the disadvantages of cascaded multilevel inverter. The THD values for various levels (seven & nine) are compared with and without PWM technique.