Implementation of Static Routing with Path Redundancy on LoRa SX1276 and ESP32 Based on Graph Theory - L. Ahmad Syamsul Irfan Akbar; Misbahuddin; Muhamad Syamsu Iqbal; A. Sjamsjiar Rachman; Giri Wahyu Wiriasto; Djul Fikri Budiman; Made Sutha Yadnya (Informatics Engineering Dept., Faculty of Engineering, University of Mataram, 2026)
The rapid development of the Internet of Things (IoT) has increased the demand for energy-efficient wireless communication systems and others under various environmental conditions. LoRa (Long Range) technology has attracted considerable attention due to its ability to support long-distance transmission with low power consumption. However, most existing LoRa network implementations rely on single-hop or non-redundant statistical routing to the gateway point, making them vulnerable to link degradation or node failure. This study enhances the statistical routing mechanism with path redundancy implemented on an ESP32 microcontroller and an SX1276 LoRa transceiver module to improve communication transmission. The network topology is modeled using graph theory, where each node is represented as a vertex and communication paths are represented as weighted edges based on the Received Signal Strength Indicator (RSSI). The primary and backup routes are derived from the minimum-weighted path in the graph. Experimental results show that incorporating path redundancy improves the packet delivery ratio (PDR) and maintains communication continuity during primary path quality degradation. The proposed approach demonstrates the feasibility of a reliable multi-hop LoRa network using statistical routing with graph-based path redundancy.