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Y. Kusuma Latha
K L University
Computer Science & IT Electrical & Electronics Engineering

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Journal : International Journal of Electrical and Computer Engineering

 1 
An Interleaved Boost Converter Based PFC Control Strategy for BLDC motor V. Ramesh; Y. Kusuma Latha
International Journal of Electrical and Computer Engineering (IJECE) Vol 5, No 5: October 2015
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (249.972 KB) | DOI: 10.11591/ijece.v5i5.pp957-966

Abstract

In this paper, interleaved power factor correction (PFC) boost converter based control strategy for BLDC motor has been Proposed. The converter exhibits the characteristics of voltage doublers for duty greater than 0.5. The switching losses and losses during reverse recovery operation are considerably reduced in this proposed topology. This is due reduction in switching voltages due to voltage doubler mode. The proposed topology has high efficiency compared to conventional counterpart due to slight increase in conduction losses. In this paper, the proposed PFC control Strategy has been applied to a six switch and four switch VSI fed BLDC Motor drive for effective torque ripple minimization. A comparison is also made between the six switch and Four Switch VSI fed PMBLDC Motor drive.
A Fuzzy Logic Control Strategy for Buck PFC Converter Based 4- Switch VSI Fed BLDC Motor Drive V. Ramesh; Y. Kusuma Latha
International Journal of Electrical and Computer Engineering (IJECE) Vol 6, No 4: August 2016
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (479.737 KB) | DOI: 10.11591/ijece.v6i4.pp1470-1480

Abstract

In this paper, a new Buck PFC dc–dc converter topology along with fuzzy logic control for a permanent magnet (PM) brushless dc motor (PMBLDCM) has been proposed. The proposed buck-PFC converter topology is on single stage power factor correction converter. A concept of dc link voltage control which is proportional to speed of the PMBLDCM is used in this paper. The stator currents of the PMBLDCM during step change in the reference speed are controlled within the specified limits by an addition of a rate limiter in the reference dc link voltage. The effectives of the proposed control strategy of PMBLDCM drive is validated through simulation results.
Co-Authors V. Ramesh