S. Meyyappan
Annamalai University, India

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Journal : International Journal of Electrical and Computer Engineering

Black Box Model based Self Healing Solution for Stuck at Faults in Digital Circuits S. Meyyappan; V. Alamelumangai
International Journal of Electrical and Computer Engineering (IJECE) Vol 7, No 5: October 2017
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (670.18 KB) | DOI: 10.11591/ijece.v7i5.pp2451-2458

Abstract

The paper proposes a design strategy to retain the true nature of the output in the event of occurrence of stuck at faults at the interconnect levels of digital circuits. The procedure endeavours to design a combinational architecture which includes attributes to identify stuck at faults present in the intermediate lines and involves a healing mechanism to redress the same. The simulated fault injection procedure introduces both single as well as multiple stuck-at faults at the interconnect levels of a two level combinational circuit in accordance with the directives of a control signal. The inherent heal facility attached to the formulation enables to reach out the fault free output even in the presence of faults. The Modelsim based simulation results obtained for the Circuit Under Test [CUT] implemented using a Read Only Memory [ROM], proclaim the ability of the system to survive itself from the influence of faults. The comparison made with the traditional Triple Modular Redundancy [TMR] exhibits the superiority of the scheme in terms of fault coverage and area overhead.