Yasir Amer Abbas
University of Diyala

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Journal : Indonesian Journal of Electrical Engineering and Computer Science

Efficient hardware implementation for lightweight mCrypton algorithm using FPGA Yasir Amer Abbas; Ahmed Salah Hameed; Safa Hazim Alwan; Maryam Adnan Fadel
Indonesian Journal of Electrical Engineering and Computer Science Vol 23, No 3: September 2021
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijeecs.v23.i3.pp1674-1680

Abstract

The lightweight cryptography is used for low available resources devices such as radio frequency identification (RFID) tags, internet of things (IoTs) and wireless sensor networks. In such case, the lightweight cryptographic algorithms should consider power consumption, design area, speed, and throughput. This paper presents a new architecture of mCrypton lightweight cryptographic algorithm which considers the above-mentioned conditions. Resource-shared structure is used to reduce the area of the new architecture. The proposed architecture is implemented using ISE Xilinx V14,5 and Spartan 3 FPGA platform. The simulation results introduced that the proposed design area is 375 of slices, up to 302 MHz operating frequency, a throughput of 646 Mbps, efficiency of 1.7 Mbps/slice and 0.089 Watt power consumption. Thus, the proposed architecture outperforms similar architectures in terms of area, speed, efficiency and throughput.
Efficient hardware implementation for lightweight Loong algorithm using FPGA Marwa Subhi Ibrahim; Yasir Amer Abbas; Mudhafar Hussein Ali
Indonesian Journal of Electrical Engineering and Computer Science Vol 30, No 1: April 2023
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijeecs.v30.i1.pp451-459

Abstract

Recently low-resource devices such as radio frequency identification (RFID), internet of things (IoT), and wireless sensor networks (WSN) using lightweight cryptography (LWC) to protect devices. Created or design low-resource devices with a lightweight cryptographic technique should take into account important factors such as the battery life and the amount of data to be processed. This paper provides a new hardware designed for Loong lightweight cryptographic algorithm that takes into account the previously described constraints. The new hardware architecture for Loong algorithm with resource sharing to reduce system designed. The proposed approach is implemented using ISE Xilinx V14.7 using Virtex 4 field programmable gate array (FPGA) platform. The synthesis analysis for ISE showed the throughput of 851.264 Mbps with efficiency of 2.282 Mbps/slice, and a power consumption of 0.193 Watt. The implementation designed show the all-algorithms size consists of 373 slices, and the maximum possible operating frequency is 212.816 MHz. To the best of our knowledge, this is the first time that Loong algorithm has been implemented on FPGA using very high-speed integrated circuit hardware description language (VHDL).