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All Journal International Journal of Electrical and Computer Engineering
Ramesh Siddaiah
Affiliated to Visvesvaraya Technological University
Computer Science & IT Electrical & Electronics Engineering

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Journal : International Journal of Electrical and Computer Engineering

 1 
Randomness properties of sequence generated using logistic map with novel permutation and substitution techniques Pushpalatha Gopalakrishna Saraswathy; Ramesh Siddaiah
International Journal of Electrical and Computer Engineering (IJECE) Vol 13, No 4: August 2023
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijece.v13i4.pp4369-4378

Abstract

In this paper, a design of a chaos-based keystream generator (KSG) using a novel permutation technique with various two-dimensional patterns and a substitution technique with Z4 mapping is proposed. Initially, a chaotic function such as a logistic map is used to generate a pseudo-random number. Then these numbers are converted into binary sequences using binary mapping. In order to achieve statistical properties of the resultant binary sequences, a novel method of KSG is developed by considering parameters such as initial value “x0”, system parameter “r”, novel permutation techniques defined by 2-dimensional patterns, and substitution technique defined over Z4 transformation. The binary sequences so obtained are subjected to randomness tests by applying the National Institute of Standards and Technology (NIST) SP-800-22 (Revision 1a) test suite for investigation of its randomness properties to obtain suitable sequences which can be used as a key for cryptographic applications. From the results obtained, it is found that the binary sequences exhibit better randomness properties as per the cryptographic requirements.
Co-Authors Pushpalatha Gopalakrishna Saraswathy