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All Journal Indonesian Journal of Electrical Engineering and Informatics (IJEEI)
Gunawan, Teddy Surya
ECE Department, Faculty of Engineering, International Islamic University Malaysia
Computer Science & IT Electrical & Electronics Engineering

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Journal : Indonesian Journal of Electrical Engineering and Informatics (IJEEI)

 1 
Advanced Multimodal Emotion Recognition for Javanese Language Using Deep Learning Arifin, Fatchul; Nasuha, Aris; Priambodo, Ardy Seto; Winursito, Anggun; Gunawan, Teddy Surya
Indonesian Journal of Electrical Engineering and Informatics (IJEEI) Vol 12, No 3: September 2024
Publisher : IAES Indonesian Section

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.52549/ijeei.v12i3.5662

Abstract

This research develops a robust emotion recognition system for the Javanese language using multimodal audio and video datasets, addressing the limited advancements in emotion recognition specific to this language. Three models were explored to enhance emotional feature extraction: the SpectrogramImage Model (Model 1), which converts audio inputs into spectrogram images and integrates them with facial images for emotion labeling; the Convolutional-MFCC Model (Model 2), which leverages convolutional techniques for image processing and Mel-frequency cepstral coefficients for audio; and the Multimodal Feature-Extraction Model (Model 3), which independently processes video and audio features before integrating them for emotion recognition. Comparative analysis shows that the Multimodal Feature-Extraction Model achieves the highest accuracy of 93%, surpassing the Convolutional-MFCC Model at 85% and the Spectrogram-Image Model at 71%. These findings demonstrate that effective multimodal integration, mainly through separate feature extraction, significantly enhances emotion recognition accuracy. This research improves communication systems and offers deeper insights into Javanese emotional expressions, with potential applications in human-computer interaction, healthcare, and cultural studies. Additionally, it contributes to the advancement of sophisticated emotion recognition technologies.
Deep Learning Techniques for Advanced Drone Detection Systems: A Comprehensive Review of Techniques, Challenges and Future Directions Muhamad Zamri, Fatin Najihah; Gunawan, Teddy Surya; Kartiwi, Mira; Pratondo, Agus; Yusoff, Siti Hajar; Mohd. Mustafah, Yasir
Indonesian Journal of Electrical Engineering and Informatics (IJEEI) Vol 12, No 4: December 2024
Publisher : IAES Indonesian Section

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.52549/ijeei.v12i4.6028

Abstract

The widespread use of Unmanned Aerial Vehicles (UAVs), commonly known as drones, across various sectors, such as civilian, commercial, and military operations, has created significant challenges in ensuring security, safety, and privacy. This paper provides a comprehensive review of the latest advancements in drone detection systems leveraging deep learning techniques, covering the period from 2020 to 2024. It critically evaluates both optical (visible light and thermal infrared) and non-optical (radio frequency, radar, and acoustic) detection methodologies. The analysis includes cutting-edge models such as Convolutional Neural Networks (CNNs), Recurrent Neural Networks (RNNs), and Generative Adversarial Networks (GANs), focusing on their application in drone detection. Key challenges like real-time processing, environmental interference, and differentiation between drones and similar objects are examined. Potential solutions, including sensor fusion, attention mechanisms, and the integration of emerging technologies such as the Internet of Things (IoT) and 5G networks, are discussed in detail. The paper concludes with future research directions to enhance drone detection systems' robustness, scalability, and accuracy, particularly in complex and dynamic environments. This review offers valuable insights for researchers and industry professionals working towards next-generation drone detection technologies.
Design and Performance Analysis of a Fast 4-Way Set Associative Cache Controller using Tree Pseudo Least Recently Used Algorithm Hazlan, Mohamed Alfian Al-Zikry; Gunawan, Teddy Surya; Yaacob, Mashkuri; Kartiwi, Mira; Arifin, Fatchul
Indonesian Journal of Electrical Engineering and Informatics (IJEEI) Vol 11, No 4: December 2023
Publisher : IAES Indonesian Section

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.52549/.v11i4.5014

Abstract

In the realm of modern computing, cache memory serves as an essential intermediary, mitigating the speed disparity between rapid processors and slower main memory. Central to this study is the development of an innovative cache controller for a 4-way set associative cache, meticulously crafted using VHDL and structured as a Finite State Machine. This controller efficiently oversees a cache of 256 bytes, with each block encompassing 128 bits or 16 bytes, organized into four sets containing four lines each. A key feature of this design is the incorporation of the Tree Pseudo Least Recently Used (PLRU) algorithm for cache replacement, a strategic choice aimed at optimizing cache performance. The effectiveness of this controller was rigorously evaluated using ModelSim, which generated a comprehensive timing diagram to validate the design's functionality, especially when integrated with a segmented main memory of four 1KB banks. The results from this evaluation were promising, showcasing precise logic outputs within the timing diagram. Operational efficiency was evidenced by the controller's swift processing speeds: read hits were completed in a mere three cycles, read misses in five and a half cycles, and both write hits and misses in three and a half cycles. These findings highlight the controller's capability to enhance cache memory efficiency, striking a balance between the complexities of set-associative mapping and the need for optimized performance in contemporary computing systems. This study not only demonstrates the potential of the proposed cache controller design in bridging the processor-memory speed gap but also contributes significantly to the field of cache memory management by offering a viable solution to the challenges posed by traditional cache configurations.
Co-Authors Agus Pratondo Ardy Seto Priambodo Arifin, Fatchul Aris Nasuha Fatchul Arifin Hazlan, Mohamed Alfian Al-Zikry Kartiwi, Mira Kartiwi, Mira Mohd. Mustafah, Yasir Muhamad Zamri, Fatin Najihah Winursito, Anggun Yaacob, Mashkuri Yusoff, Siti Hajar