TWO STAGE 10-BIT ADC WITH DELAY-LINE TDC BASED SECOND STAGE

Mattada, Mahantesh
Guhilot, Hansraj

International Journal of Reconfigurable and Embedded Systems (IJRES)
Vol 9, No 3: November 2020

Two stage Time based 10-bit ADC is designed and verified in a commercial VLSI CAD tool. Simple VCO based ADC design used in the first stage as coarse, whereas TDC based second stage used for fine conversion. Each stage will give 5bit resolution and work concurrently during the conversion process. Delay-line/Flash TDC is used in the second stage because of its better conversion speed. Flash TDC will give thermometer code and a binary conversion stage is required. To make it simple and area efficient, ROM based Thermometer to Binary(T2B) converters are used in the final readout module. Average power dissipation of 1.155mW for overall system is measured and makes it suitable for low power applications.