International Journal of Reconfigurable and Embedded Systems (IJRES)
Vol 4, No 3: November 2015

Design and Implementation of Recursive Least Square Adaptive Filter Using Block DCD approach

Sachin S. Khanande (G.H.Raisoni College of Engineering)
S.J. Honade (G.H.Raisoni College of Engineering)



Article Info

Publish Date
01 Nov 2015

Abstract

Due to the explosive growth of multimedia application and tremendous demands in Very Large Scale Integrated (VLSI), there is a need of high speed and low power digital filters for digital signal processing applications. In Digital Signal Processing (DSP) systems, Finite Impulse Response (FIR) filters are one of the most common components which is used, by convolving the input data samples with the desired unit sample response of the filter. The proposed work deals with the design and implementation of RLS adaptive filter using block DCD approach. The evaluation of speed, area and power for proposed work will be done. Also, the comparison of the proposed design with the existing will be carried out for various input combinations.

Copyrights © 2015






Journal Info

Abbrev

IJRES

Publisher

Subject

Economics, Econometrics & Finance

Description

The centre of gravity of the computer industry is now moving from personal computing into embedded computing with the advent of VLSI system level integration and reconfigurable core in system-on-chip (SoC). Reconfigurable and Embedded systems are increasingly becoming a key technological component ...