Indonesian Journal of Electrical Engineering and Computer Science
Vol 4, No 2: November 2016

Total Harmonic Distortion at Fault in RLC Load

Pankaj Aswal (Graphic Era University)
Suyash Kumar Singh (Graphic Era University)
Niharika Agarwal (Graphic Era University)
Vivek Sharma (Graphic Era University)
Gayatri Sharma (Graphic Era University)



Article Info

Publish Date
01 Nov 2016

Abstract

This paper focuses on the calculation of total harmonic distortion (THD) at various fault situations in case of RLC load. The faults are created by introducing heavy impedance of 1000 ohm, by blowing off the gate pulse at one of the terminals of the mosfet, and by introducing a line to ground fault. The Matlab based simulation has been done to show these effects.

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