Journal of ICT Research and Applications
Vol. 7 No. 1 (2013)

Performance Analysis of a Reconfigurable Shared Memory Multiprocessor System for Embedded Applications

Darcy Cook (JCA Electronics)
Ken Ferens (Electrical and Computer Engineering, Room E2-390 Engineering Information and Technology Complex, University of Manitoba)



Article Info

Publish Date
01 Aug 2013

Abstract

This paper presents a method to predict performance of multiple processor cores in a reconfigurable system for embedded applications. A multiprocessor framework is developed with the capability of reconfigurable processors in a shared memory system optimized for stream-oriented data and signal processing applications. The framework features a discrete time Markov based stochastic tool, which is used to analyze memory contention in the shared memory architecture, and to predict the performance increase (speed of execution) when the number of processors is varied. Performance predictions for variations of other system parameters, such as different task allocations and the number of pipeline stages are possible as well. The results of the prediction tool were verified by experimental results of a green screen application developed and run on a Xilinx Virtex-II Pro FPGA with MicroBlaze soft processors.

Copyrights © 2013






Journal Info

Abbrev

jictra

Publisher

Subject

Computer Science & IT

Description

Journal of ICT Research and Applications welcomes full research articles in the area of Information and Communication Technology from the following subject areas: Information Theory, Signal Processing, Electronics, Computer Network, Telecommunication, Wireless & Mobile Computing, Internet ...