<![CDATA[The typical challenge in embedded hardware development is the data transfer subsystem. As long as the required speeds are low and high latency is acceptable, there is quite a simple solution with serial bus like controller area network (CAN). In case of high speed (hundreds of megabits per second) with the high temporal determinism, the solution becomes significantly more complicated, requiring expensive components and growing complexity of the embedded software/firmware. We consider industrial inkjet as an example. The device typically includes moving carriage (with printheads) to jet along the media. Existing solutions use optical fiber cable or shielded twisted pair (STP) cable to connect modules. So, additional physical and logical devices are required (for example, for buffering or serial-to-parallel data conversion). For a long time, this approach has no valuable alternative. The novel single-module solution involves abandoning the intermediate high-speed channel. Instead of multiple modules and high-speed communication links between them, the single module is installed near the data destination and connected to the master PC via Ethernet. The functionality of high-speed data transfer subsystem is delegated to the shared dynamic random-access memory (DRAM) and controller, implemented with field-programmable gate array (FPGA) resources. So, the connection cable is not needed anymore and the transfer speed is virtually limited only by DRAM performance.]]>
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