International Journal of Electrical and Computer Engineering
International Journal of Electrical and Computer Engineering (IJECE, ISSN: 2088-8708, a SCOPUS indexed Journal, SNIP: 1.001; SJR: 0.296; CiteScore: 0.99; SJR & CiteScore Q2 on both of the Electrical & Electronics Engineering, and Computer Science) is the official publication of the Institute of Advanced Engineering and Science (IAES). The journal is open to submission from scholars and experts in the wide areas of electrical, electronics, instrumentation, control, telecommunication and computer engineering from the global world.
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Inactive power detection in AC network
Nickolay I. Schurov;
Sergey V. Myatezh;
Alexandr V. Myatezh;
Boris V. Malozyomov;
Alexandr A. Shtang
International Journal of Electrical and Computer Engineering (IJECE) Vol 11, No 2: April 2021
Publisher : Institute of Advanced Engineering and Science
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DOI: 10.11591/ijece.v11i2.pp966-974
Using the examples of wave and vector diagrams, we study the conditions for the appearance of components of inactive power in an AC network, which are known as reactive power and distortion power. It is shown that the components of the active, reactive power and distortion power are mutually orthogonal and form a power balance, which can be violated mainly due to methodological errors in calculating these components under conditions of non-stationary mode parameters. It is established that the interaction of reactive power and distortion power occurs at the instantaneous power level, and changing their phase shifts allows you to adjust the shape of the resulting power without involving additional active power in the AC network. The results obtained will allow not only to correctly determine the proportion and nature of the components of inactive capacities, which is valuable for solving the problems of optimizing modes in AC networks, but also to create effective technical means of compensating for the identified inactive capacities in the future.
Interconnection viability of high demand isolated area through a HVDC-VSC link
Juan A. Varela;
Mario A. Rios
International Journal of Electrical and Computer Engineering (IJECE) Vol 11, No 2: April 2021
Publisher : Institute of Advanced Engineering and Science
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DOI: 10.11591/ijece.v11i2.pp1002-1010
Electrically isolated areas are separated by a great distance and, normally, have a considerably low demand; in consequence, these are non-interconnected from the main power grid or electrical national transmission systems. Great distance and low demand are the reasons why an interconnection project in high voltage AC is not feasible in most of these cases. Nevertheless, there are some isolated areas with high power demand and even though they are separated from the main grid by large distances and hard terrains; however, it is still reasonable to think about an interconnection project. This paper had developed a methodology that allows the evaluation of viability, technically and economically, of a HDVC-VSC interconnection project for great distance and high demand considering overhead and/or underground DC line. The methodology was applied to a case of study in Peru, based on the projected interconnection between Moyobamba and the isolated area of Iquitos; showing that HVDC is a feasible alternative.
DC-DC converter with 50 kHz-500 kHz range of switching frequency for passive component volume reduction
Mohd Amirul Naim Kasiran;
Asmarashid Ponniran;
Nurul Nabilah Mad Siam;
Mohd Hafizie Yatim;
Nor Azmira Che Ibrahim;
Asmawi Md Yunos
International Journal of Electrical and Computer Engineering (IJECE) Vol 11, No 2: April 2021
Publisher : Institute of Advanced Engineering and Science
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DOI: 10.11591/ijece.v11i2.pp1114-1122
This paper presents the relationship of switching frequency towards passive components volume of DC-DC boost converter. Principally, the inductor current ripple and capacitor voltage ripple must be considered in order to design the inductor and capacitor, respectively. By increasing the switching frequency, smaller size and volume of passive component can be designed. As the consequences, the switching loss increases during switching transition at turn-ON and turn-OFF conditions. This paper used soft-switching technique to reduce the switching loss at turn-ON condition. The soft-switching technique is realized by adding resonant circuit in DC-DC boost converter. The effectiveness of resonant circuit will be analysed, thus, the efficiency of the converter can be improved. The range of switching frequency considered in the experimental are 50 kHz to 500 kHz. A 100 W prototype has been developed and tested in order to verify the principle. The switching loss experimentally confirm reduced by implementing soft-switching technique with efficiency converter improved from 96.36% to 97.12% when 500 kHz of switching frequency is considered. The passive components volume reduction is achieved when high switching frequency is used where the total volume of passive component when 50 kHz and 500 kHz are 0.083 dm3 and 0.010 dm3, respectively.
Arabic tweeps dialect prediction based on machine learning approach
Khaled Alrifai;
Ghaida Rebdawi;
Nada Ghneim
International Journal of Electrical and Computer Engineering (IJECE) Vol 11, No 2: April 2021
Publisher : Institute of Advanced Engineering and Science
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DOI: 10.11591/ijece.v11i2.pp1627-1633
In this paper, we present our approach for profiling Arabic authors on twitter, based on their tweets. We consider here the dialect of an Arabic author as an important trait to be predicted. For this purpose, many indicators, feature vectors and machine learning-based classifiers were implemented. The results of these classifiers were compared to find out the best dialect prediction model. The best dialect prediction model was obtained using random forest classifier with full forms and their stems as feature vector.
Improving saddle stitching line using affordable embedded system
Salam Al-augby;
Ahmed Y. Mjhool;
Mohammed W. Alboaldeen;
Ali Al-Sabbagh
International Journal of Electrical and Computer Engineering (IJECE) Vol 11, No 2: April 2021
Publisher : Institute of Advanced Engineering and Science
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DOI: 10.11591/ijece.v11i2.pp1235-1242
In most printing factories, the stitching machine is considered as a significant tool in accomplishing the printing process cycle, such as in the Printing House of the University of Kufa (PHUK), complete their jobs using a cheap manual machine, and thus this leads to an increase in the number of employees and work hours. That is because the automated stitching machine of production is very costly. A decent printing house design maximizes production with a minimum investment in new equipment parts. However, a decent PHUK layout alone cannot reach the intended aims unless firmly linked with a developed production line of an automated stitching machine for the purpose of reducing cost, time, and efforts. This article focused on designing and developing automatic saddle stitching machines for folded paper sheet products such as newspapers, magazines, catalogs, exam sheets, etc. using accommodate devices such as Arduino and infrared sensors. Furthermore, the proposed design is applied in PHUK successfully and it showed that the cost of the stitching machine and the manpower is reduced by 60 percent, also the time is reduced by 70 percent. Finally, one of the significant implications of this work is using IT in management of resources.
Design and implementation of DA FIR filter for bio-inspired computing architecture
B. U. V. Prashanth;
Mohammed Riyaz Ahmed;
Manjunath R. Kounte
International Journal of Electrical and Computer Engineering (IJECE) Vol 11, No 2: April 2021
Publisher : Institute of Advanced Engineering and Science
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DOI: 10.11591/ijece.v11i2.pp1709-1718
This paper elucidates the system construct of DA-FIR filter optimized for design of distributed arithmetic (DA) finite impulse response (FIR) filter and is based on architecture with tightly coupled co-processor based data processing units. With a series of look-up-table (LUT) accesses in order to emulate multiply and accumulate operations the constructed DA based FIR filter is implemented on FPGA. The very high speed integrated circuit hardware description language (VHDL) is used implement the proposed filter and the design is verified using simulation. This paper discusses two optimization algorithms and resulting optimizations are incorporated into LUT layer and architecture extractions. The proposed method offers an optimized design in the form of offers average miminimizations of the number of LUT, reduction in populated slices and gate minimization for DA-finite impulse response filter. This research paves a direction towards development of bio inspired computing architectures developed without logically intensive operations, obtaining the desired specifications with respect to performance, timing, and reliability.
A multi-objective evolutionary scheme for control points deployment in intelligent transportation systems
Martin Luther Mfenjou;
Ado Adamou Abba Ari;
Arouna Ndam Njoya;
Kolyang Kolyang;
Wahabou Abdou;
Abdelhak Mourad Gueroui
International Journal of Electrical and Computer Engineering (IJECE) Vol 11, No 2: April 2021
Publisher : Institute of Advanced Engineering and Science
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DOI: 10.11591/ijece.v11i2.pp1641-1655
One of the problems that hinder emergency in developing countries is the problem of monitoring a number of activities on inter-urban roadway networks. In the literature, the use of control points is proposed in the context of these countries in order to ensure efficient monitoring, by ensuring a good coverage while minimizing the installation costs as well as the number of accidents across these road networks. In this work, we propose an optimal deployment of these control points from several optimization methods based on some evolutionary multi-objective algorithms: the non-dominated sorting genetic algorithm-II (NSGA-II); the multi-objective particle swarm optimization (MOPSO); the strength Pareto evolutionary algorithm -II (SPEA-II); and the Pareto envelope based selection algorithm-II (PESA-II). We performed the tests and compared these deployments using Pareto front and performance indicators like the spread and hypervolume and the inverted generational distance (IGD). The results obtained show that the NSGA-II method is the most adequate in the deployment of these control points.
A trust-based authentication framework for security of WPAN using network slicing
Sazia Parvin;
Amjad Gawanmeh;
Sitalakshmi Venkatraman;
Ali Alwadi;
Jamal N. Al-Karaki;
Paul D. Yoo
International Journal of Electrical and Computer Engineering (IJECE) Vol 11, No 2: April 2021
Publisher : Institute of Advanced Engineering and Science
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DOI: 10.11591/ijece.v11i2.pp1375-1387
New technologies bring along many challenges including security and privacy. Wireless personal area networks (WPANs) are characterized by limited energy resources and computing power that calls for lightweight security mechanisms in these networks as a mandatory requirement. In this paper, a lightweight trust-based framework for node authentication in WPAN is proposed. Our main objective is to minimise the effort in distinguishing valid requests of trustworthy nodes from invalid requests of malicious nodes that can result in network compromises. We achieve this through network slicing which divides the network into virtually primary and secondary networks. The proposed framework has three-fold benefits. First, it authenticates nodes’ requests based on a novel method of trust value calculation. Second, the framework maintains energy efficiency while authenticating nodes’ requests to access WPAN resources. Finally, the framework provides a solution for biasing problem that can arise due to unexpected behaviour of malicious users in WPANs. The framework efficacy is illustrated on a case study to shown how it can accurately capture trust relations among nodes while preventing malicious behavior.
Cache coherency controller for MESI protocol based on FPGA
Mays K. Faeq;
Safaa S. Omran
International Journal of Electrical and Computer Engineering (IJECE) Vol 11, No 2: April 2021
Publisher : Institute of Advanced Engineering and Science
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DOI: 10.11591/ijece.v11i2.pp1043-1052
In modern techniques of building processors, manufactures using more than one processor in the integrated circuit (chip) and each processor called a core. The new chips of processors called a multi-core processor. This new design makes the processors to work simultanously for more than one job or all the cores working in parallel for the same job. All cores are similar in their design, and each core has its own cache memory, while all cores shares the same main memory. So if one core requestes a block of data from main memory to its cache, there should be a protocol to declare the situation of this block in the main memory and other cores.This is called the cache coherency or cache consistency of multi-core. In this paper a special circuit is designed using very high speed integrated circuit hardware description language (VHDL) coding and implemented using ISE Xilinx software. The protocol used in this design is the modified, exclusive, shared and invalid (MESI) protocol. Test results were taken by using test bench, and showed all the states of the protocol are working correctly.
Soil moisture level prediction using optical technique and artificial neural network
Mars Hong Xuan Wai;
Audrey Huong;
Xavier Ngu
International Journal of Electrical and Computer Engineering (IJECE) Vol 11, No 2: April 2021
Publisher : Institute of Advanced Engineering and Science
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DOI: 10.11591/ijece.v11i2.pp1752-1760
This research describes the use of an optical system combined with artificial neural network (ANN) for wireless and nondestructive prediction of soil moisture level. The former system comprising of near infrared (NIR) emitters of wavelengths 1200 nm and 1450 nm, and a photodetector for near real time soil moisture measurement in loams and peats holding different amount of water. There were 63 and 90 sets of data from loams and peats, respectively, used in the development of the dual stage-multiclass ANN model, wherein measurement of light attenuation (from nondestructive system) was correlated with percent soil moisture (from destructive gold standard approach) in pre-measurement stage. The result revealed a relatively good performance in the training of the NN with regression, R, of 0.8817 and 0.8881, and satisfactory error performance of 0.7898 and 1.172, for loams and peats, respectively. The testing of the system on 50 new samples of loam and peat showed a considerably high mean accuracy of 92 % for loams while 82 % was observed for peats. This study attributes the poorer performance of the system used on peats to the detection resolution of percent soil moisture, and structure and properties of the corresponding soil. This work concluded that the developed technology may be feasible for use in the future design and improvement of agricultural soil management.