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International Journal of Electrical and Computer Engineering
Published by Institute of Advanced Engineering and Science
ISSN : 20888708     EISSN : 27222578     DOI : -
Core Subject : Science, Engineering,
Computer Science & IT Electrical & Electronics Engineering
International Journal of Electrical and Computer Engineering (IJECE, ISSN: 2088-8708, a SCOPUS indexed Journal, SNIP: 1.001; SJR: 0.296; CiteScore: 0.99; SJR & CiteScore Q2 on both of the Electrical & Electronics Engineering, and Computer Science) is the official publication of the Institute of Advanced Engineering and Science (IAES). The journal is open to submission from scholars and experts in the wide areas of electrical, electronics, instrumentation, control, telecommunication and computer engineering from the global world.
Arjuna Subject : Ilmu Komputer (semua kategori) - Ilmu Komputer (Lain-Lain)
Articles 18 Documents
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Search results for , issue "Vol 3, No 4: August 2013" : 18 Documents clear
Complex Network Framework Based Comparative Study of Power Grid Centrality Measures A. B. M. Nasiruzzaman; H. R. Pota
International Journal of Electrical and Computer Engineering (IJECE) Vol 3, No 4: August 2013
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (181.831 KB)

Abstract

New closeness and betweenness based centrality measures have been evaluated in this paper. Power grid is modeled as a directed graph. The graph is analyzed in terms of complex network theory to identify influential nodes which control power flow pattern throughout the whole grid and as a result can create cascade if removed unintentionally or targetedly. Various measures of impacts have been analyzed to show that power grid has scale-free network characteristics, i.e., it is very much vulnerable to targeted node removal. Measures of impacts include characteristic path length, connectivity loss and blackout size. Rank similarity analysis have been carried out to show that nominal condition of power system gives critical nodes which remain critical with changes in system operating conditions as well.DOI:http://dx.doi.org/10.11591/ijece.v3i4.3312
Iris Image Quality Testing and Iris Verification Lidong Wang
International Journal of Electrical and Computer Engineering (IJECE) Vol 3, No 4: August 2013
Publisher : Institute of Advanced Engineering and Science

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Abstract

The purpose of this study was to investigate the iris image quality and iris verification of eyes in brown, hazel, green, and blue, respectively, and the iris image quality and iris verification under different conditions such as the changed stand-off distances, the motions of the head and eyes, with glasses, and without glasses. A comparative study of three eye colors in brown, hazel, and green was conducted using a non-parametric method based on the H test. The H test results show that there is no significant difference in the iris image quality of eyes in brown, hazel, or green when the level of significance is 0.05.DOI:http://dx.doi.org/10.11591/ijece.v3i4.2769
A Low Power 32 Bit CMOS ROM Using A Novel ATD Circuit Siddhant Kukreti; Gurmohan Singh; Vemu Sulochana
International Journal of Electrical and Computer Engineering (IJECE) Vol 3, No 4: August 2013
Publisher : Institute of Advanced Engineering and Science

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Abstract

A low power high speed 32 Bit ROM circuit implemented on 0.18µm CMOS process has been presented in this paper. The circuit is build using a parallel ROM core structure and runs on 1.8 V supply voltage. A novel Address Transition Decoder (ATD) circuit is proposed which energizes the ROM components such as Row Decoder, Column Decoder, ROM core etc, for short time intervals when there is a transition in input address bits. The power consumed in ROM with proposed ATD circuit is 0.78 mW, which corresponds to 82.27% reduction in power as compared to ROM without ATD circuit (4.46 mW). At the output almost full signal swing has been achieved without using any sense amplifier. The implemented ROM has a very low latency of 0.56 ns.DOI:http://dx.doi.org/10.11591/ijece.v3i4.3165
All-Optical NOT Logic Gate Based on Photonic Crystals Majid Ghadrdan; Mohammad Ali Mansouri-Birjandi
International Journal of Electrical and Computer Engineering (IJECE) Vol 3, No 4: August 2013
Publisher : Institute of Advanced Engineering and Science

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Abstract

A novel scheme for implementation of all-optical NOT logic gate based on photonic crystal ring resonator has been proposed. Photonic crystal is comprised of two-dimensional square lattice of dielectric rods in air substrate. Indium phosphide with a refractive index of 3.1 is adopted as the material of the rods. The finite different time domain (FDTD) and plane wave Expansion (PWE) methods are used to analyze the behavior of the structure. The simulation results show that the contrast ratio is 10.97dB for NOT gate. Moreover, the operational wavelength of the input ports is 1.55µm. Since the structure has a simple geometric shape with clear operating principle, it is potentially applicable for photonic integrated circuits.DOI:http://dx.doi.org/10.11591/ijece.v3i4.2909
A Novel Low Noise High Gain CMOS Instrumentation Amplifier for Biomedical Applications Akshay Goel; Gurmohan Singh
International Journal of Electrical and Computer Engineering (IJECE) Vol 3, No 4: August 2013
Publisher : Institute of Advanced Engineering and Science

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Abstract

This work describes a novel technique of designing a low noise high gain CMOS instrumentation amplifier for biomedical applications. A three op-amp instrumentation amplifier have been designed by employing two simple op-amps at the two inputs and a folded cascode op-amp at the output. Both input and output stage op-amps are 2-stage. Most of the earlier designed op-amp in literature uses same type of op-amp at the input and output stages of instrumentation amplifier. By using folded cascode two stage op-amp at the output, we have achieved significant improvement in gain and CMRR. Transistors sizing plays a vital role in achieving high gain and CMRR. To achieve a desirable gain, common mode rejection ratio and other performance metrics, selection of most appropriate op-amp circuit topologies & optimum transistor sizing was the main criteria for design of instrumentation amplifier for biomedical applications. The instrumentation amplifier is simulated using Cadence Spectre tool and layout is designed in Cadence Layout editor at 0.18µm CMOS technology. Each of the input op-amp provides a gain and CMRR of 45dB and 72dB respectively. The output stage folded cascode amplifier provides a gain of 82dB and a CMRR of 92dB. The design achieves an overall gain and CMRR of 67dB and 92db respectively. The designed instrumentation amplifier consumes only 263µW of power suitable for biomedical signal processing applications.DOI:http://dx.doi.org/10.11591/ijece.v3i4.3170
Modeling and Simulation of a Solar Power Source for a Clean Energy without Pollution Mohamed Louzazni; El Hassan Aroudam; Hanane Yatimi
International Journal of Electrical and Computer Engineering (IJECE) Vol 3, No 4: August 2013
Publisher : Institute of Advanced Engineering and Science

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Abstract

Photovoltaic cell generation is the technique which uses photovoltaic cell to convert solar energy into electrical energy. Now  a  days  ,the photovoltaic  generation  is  developing  increasingly  fast  as  a  renewable  energy  source. The functioning of a photovoltaic cell as the power generator is equivalent to an electric circuit containing a current generator, diode, series resistance and shunt resistance. This paper presents a modeling and simulation of a photovoltaic system constitutes of a generator (PVG), DC-DC converter (boost chopper) to transfer the maximum power to a base transmitter station. The temperature and irradiance effects on the PVG will be studied, particularly on the variables such as the short circuit current Icc, the open circuit voltage Voc, the performance η and the fill factor FF. Depending on the load (BTS, I=60A, V=48V) profile and climatic factors influencing, we can find a highly gap between the maximum power supplied by the PVG and that actually transferred to the BTS. A maximum power point tracker (MPPT) based on a boost converter commanded by a Pulse Width Modulation (PWM) is used for extracting the maximum power from the PVG. Thus, a real time tracking of the optimal point of functioning (MPP: Maximum Power Point) is necessary to optimize the efficiency on the system. The modeling and simulation of the system (PVG, boost converter, PWM and MPPT algorithm Perturbation and Observation P&O) is then made with Matlab/Simulink software.DOI:http://dx.doi.org/10.11591/ijece.v3i5.3639
Alert Correlation through a Multi Components Architecture Saeid Dadkhah; M. R. KhaliliShoja; Hassan Taheri
International Journal of Electrical and Computer Engineering (IJECE) Vol 3, No 4: August 2013
Publisher : Institute of Advanced Engineering and Science

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Abstract

Alert correlation is a process that analyzes the raw alerts produced by one or more intrusion detection systems, reduces nonrelevant ones, groups together alerts based on similarity and causality relationships between them and finally makes aconcise and meaningful view of occurring or attempted intrusions. Unfortunately, most correlation approaches use just a few components that aim only specific correlation issues and so cause reduction in correlation rate. This paper uses a general correlation model that has already been presented in [9] and is consisted of a comprehensive set of components. Then some changes are applied in the component that is related to multi-step attack scenario to detect them better and so to improve semantic level of alerts. The results of experiments with DARPA 2000 data set obviously show the effectiveness of the proposed approach.DOI:http://dx.doi.org/10.11591/ijece.v3i4.2771
Fault Detection Approaches to Power System: State-of-the-Art Article Reviews for Searching a New Approach in the Future Pituk Bunnoon
International Journal of Electrical and Computer Engineering (IJECE) Vol 3, No 4: August 2013
Publisher : Institute of Advanced Engineering and Science

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Abstract

This paper proposes the state-of-the-art of fault detection approach a power system. Severalarticles presented it in each implementation and method from the last to present (2013). Theadvantage of the approach would be developed to the new detection in the future. Manyinterested topics used for detection of fault in the power system. In this research can beclassified into two types interesting in fault detection. This review of many paper will beused to develop the research or find the new method for an appropriate fault detection in thepower system.DOI:http://dx.doi.org/10.11591/ijece.v3i4.3195

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