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International Journal of Electrical and Computer Engineering
Published by Institute of Advanced Engineering and Science
ISSN : 20888708     EISSN : 27222578     DOI : -
Core Subject : Science, Engineering,
Computer Science & IT Electrical & Electronics Engineering
International Journal of Electrical and Computer Engineering (IJECE, ISSN: 2088-8708, a SCOPUS indexed Journal, SNIP: 1.001; SJR: 0.296; CiteScore: 0.99; SJR & CiteScore Q2 on both of the Electrical & Electronics Engineering, and Computer Science) is the official publication of the Institute of Advanced Engineering and Science (IAES). The journal is open to submission from scholars and experts in the wide areas of electrical, electronics, instrumentation, control, telecommunication and computer engineering from the global world.
Arjuna Subject : Ilmu Komputer (semua kategori) - Ilmu Komputer (Lain-Lain)
Articles 82 Documents
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Search results for , issue "Vol 9, No 3: June 2019" : 82 Documents clear
Energy optimization of 6T SRAM cell using low-voltage and high-performance inverter structures M. Madhusudhan Reddy; M. Sailaja; K. Babulu
International Journal of Electrical and Computer Engineering (IJECE) Vol 9, No 3: June 2019
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (1398.998 KB) | DOI: 10.11591/ijece.v9i3.pp1606-1619

Abstract

The performance of the cell deteriorates, when static random access memory (SRAM) cell is operated below 1V supply voltage with continuous scale down of the complementary metal oxide semiconductor (CMOS) technology. The conventional 6T, 8T-SRAM cells suffer writeability and read static noise margins (SNM) at low-voltages leads to degradation of cell stability. To improve the cell stability and reduce the dynamic power dissipation at low- voltages of the SRAM cell, we proposed four SRAM cells based on inverter structures with less energy consumption using voltage divider bias current sink/source inverter and NOR/NAND gate using a pseudo-nMOS inverter. The design and implementation of SRAM cell using proposed inverter structures are compared with standard 6T, 8T and ST-11T SRAM cells for different supply voltages at 22-nm CMOS technology exhibit better performance of the cell. The read/write static noise margin of the cell significantly increases due to voltage divider bias network built with larger cell-ratio during read path. The load capacitance of the cell is reduced with minimized switching transitions of the devices during high-to-low and low- to-high of the pull-up and pull-down networks from VDD to ground leads to on an average 54% of dynamic power consumption. When compared with the existing ones, the read/write power of the proposed cells is reduced to 30%. The static power gets reduced by 24% due to stacking of transistors takes place in the proposed SRAM cells as compare to existing ones. The layout of the proposed cells is drawn at a 45-nm technology, and occupies an area of 1.5 times greater and 1.8 times greater as compared with 6T-SRAM cell.
The effect of load modelling on phase balancing in distribution networks using search harmony algorithm Saeid Eftekhari; Mahmoud Oukati Sadegh
International Journal of Electrical and Computer Engineering (IJECE) Vol 9, No 3: June 2019
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (1317.974 KB) | DOI: 10.11591/ijece.v9i3.pp1461-1471

Abstract

Due to the unequal loads in phases and different customer consumption, the distribution network is unbalanced. Unbalancing in the distribution network, in addition to increasing power losses, causes unbalancing in voltages and increases operating costs. To reduce this unbalancing, various methods and algorithms have been presented. In most studies and even practical projects due to lack of information about the network loads, load models such as constant power model, constant current or constant impedance are used to model the loads. Due to the changing and nonlinear behaviours of today's loads, these models cannot show results in accordance with reality. This paper while introducing an optimal phase-balancing method, discusses the effect of load modelling on phase balancing studies. In this process the re-phasing method for balancing the network and the harmony search algorithm for optimizing the phase displacement process have been used. The simulation was carried out on an unbalanced distribution network of 25 buses. The results show well the effect of this comprehensive modelling on phase balancing studies. It also shows that in the re-phasing method for balancing the network and in the absence of a real load model, the use of which model offers the closest answer to optimal solutions.

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