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International Journal of Reconfigurable and Embedded Systems (IJRES)
ISSN : 20894864     EISSN : 27222608     DOI : -
Core Subject : Economy,
The centre of gravity of the computer industry is now moving from personal computing into embedded computing with the advent of VLSI system level integration and reconfigurable core in system-on-chip (SoC). Reconfigurable and Embedded systems are increasingly becoming a key technological component of all kinds of complex technical systems, ranging from audio-video-equipment, telephones, vehicles, toys, aircraft, medical diagnostics, pacemakers, climate control systems, manufacturing systems, intelligent power systems, security systems, to weapons etc. The aim of IJRES is to provide a vehicle for academics, industrial professionals, educators and policy makers working in the field to contribute and disseminate innovative and important new work on reconfigurable and embedded systems. The scope of the IJRES addresses the state of the art of all aspects of reconfigurable and embedded computing systems with emphasis on algorithms, circuits, systems, models, compilers, architectures, tools, design methodologies, test and applications.
Arjuna Subject : -
Articles 23 Documents
Search results for , issue "Vol 15, No 1: March 2026" : 23 Documents clear
Learning customer preference dynamics using rank-aware matrix factorization and enhanced collaborative filtering model Sundar, Sathya; Thevar Ramaraj, Eswara; Arumugam, Padmapriya
International Journal of Reconfigurable and Embedded Systems (IJRES) Vol 15, No 1: March 2026
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijres.v15.i1.pp159-169

Abstract

Understanding how customer preferences evolve over time is a critical challenge for modern recommender systems operating in large-scale, implicit-feedback–driven e-commerce environments. The primary objective of this study is to develop a unified and interpretable framework that simultaneously models ranking-based preferences, collaborative similarity structures, and temporal behavioral evolution of customers. To achieve this, the study proposes a novel hybrid framework that integrates rank-aware matrix factorization (RA-MF), enhanced collaborative filtering (CF), K-means clustering, and temporal cluster migration matrices (TCMM) for learning customer preference dynamics. The ranking factorization model effectively captures implicit signals such as purchase frequency and recency decay, while CF provides complementary similarity-based insights. K-means segmentation reveals diverse customer personas, including high-value loyal buyers and exploratory shoppers, with significant differences in spending and purchasing behavior. Quantitative evaluations demonstrate strong performance improvements, with 11–18% gains in NDCG@10, 10–15% increases in Precision@10, and notable reductions in root mean square error (RMSE) and mean absolute error (MAE). The results highlight the framework’s ability to deliver both accurate recommendations and interpretable behavioral insights, offering valuable contributions to personalized marketing, customer retention, and data-driven e-commerce strategy.
Portable verification IP: a UVM-based approach for reusable verification environments in complex IP and SoC verification Chippagi, Harinagarjun; Sumalatha, Vangala
International Journal of Reconfigurable and Embedded Systems (IJRES) Vol 15, No 1: March 2026
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijres.v15.i1.pp78-85

Abstract

Reusable and portable verification techniques are becoming more and more necessary due to the growing complexity of system-on-chip (SoC) designs and the need for quick time-to-market. In order to facilitate cross-project reusability, automation, and scalability in SoC verification, this paper introduces a portable verification IP (PVIP) framework based on the universal verification methodology (UVM). The suggested framework improves coverage efficiency and verification portability across heterogeneous platforms by integrating UVM with the portable stimulus standard (PSS). In comparison to traditional UVM-based methods, experimental evaluation shows that the PVIP framework achieves 92% functional coverage, enhances reusability by 87%, and shortens verification cycle time by 27%. These findings demonstrate how PVIP can greatly speed up verification closure, minimize engineering effort, and assist in the development of the next generation of intelligent, scalable, and industry-ready SoC verification environments.
Inquisitive biometric feature analysis and implementation for recognition tasks using camouflaged segmentation with AI and IoT Shankarrao Patil, Mahesh; J. Sarode, Harsha; Banubakode, Abhijit; Tukaram Patil, Prakash; Patil, Nutan; Varadarajan, Vijayakumar; Arrova Dewi, Deshinta
International Journal of Reconfigurable and Embedded Systems (IJRES) Vol 15, No 1: March 2026
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijres.v15.i1.pp119-129

Abstract

A vital role in reconfigurable and embedded systems which are deployed in smart environements and healthcare monitoring applications is played by human activity recognition (HAR). However, the potential leakage of sensitive user attributes raises serious privacy issues due to collection of data from the end devices and it needs to be transmitted to more powerful platforms for inference. Addressing this key challenge is principally crucial for resource-constrained embedded systems where efficiency of energy is a chief design requirement. The aim of this paper is present an energy-aware, privacy-preserving HAR framework appropriate for low-power embedded platforms. A machine learning–based camouflaged signal segmentation technique is proposed to transform the data collected from the sensor by eliminating sensitive information while preserving activity-relevant features. For characterization of trade off between the energy consumption and accuracy of recognition, parameters are extensively tuned by careful optimization in this proposed model. Experimental evaluations demonstrate that the method significantly reduces the inference of sensitive attributes such as gender, age, height, and weight, with minimal impact on HAR accuracy. Furthermore, the system supports configurable trade-offs between energy usage and classification performance, making it suitable for implementation on low-power embedded devices.

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