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Bulletin of Electrical Engineering and Informatics
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Core Subject : Engineering,
Bulletin of Electrical Engineering and Informatics (Buletin Teknik Elektro dan Informatika) ISSN: 2089-3191, e-ISSN: 2302-9285 is open to submission from scholars and experts in the wide areas of electrical, electronics, instrumentation, control, telecommunication and computer engineering from the global world. The journal publishes original papers in the field of electrical, computer and informatics engineering.
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Articles 45 Documents
Search results for , issue "Vol 8, No 2: June 2019" : 45 Documents clear
Design and parametric evaluation of UWB antenna for array arrangement Faraz Ahmed Shaikh; Sheroz Khan; A H. M. Zahirul Alam; Dominique Baillargeat; Mohamed Hadi Habaebi; Mashkuri Bin Yaacob; Jawad Shah; Zeeshan Shahid
Bulletin of Electrical Engineering and Informatics Vol 8, No 2: June 2019
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (844.872 KB) | DOI: 10.11591/eei.v8i2.1522

Abstract

This paper has introduced the concept of UWB antenna in array arrangements. The four elements of Balance Antipodal Vivaldi Antenna (BAVA) has been used for planar and H-plane array configuration in this research. Each single element of BAVA Antenna is printed on the glass-reinforced epoxy laminate material (FR4) along an overall thickness of 1.57mm and εr=4.3 respectively. The optimized measurement of each particular element is 60.75mm x 66mm approximatel. Further the parametric evaluation of four BAVA elements in different planes has been observed in this paper. The placement of array elements has almost coverd entire UWB frequency range and appropriate reflection coefficient which is better than -10dB has been established in both combinations. According to simulation results, the array elements in planar arrangement presenting a suitable reflection and works well at 3.2GHz frequency while the arrangement in H-plane the array elements works well at 7GHz of frequency. In planar arrangement, the operating frequency of antenna elements is shifting as results of the distance among inter elements which increase in wavelength. In H-plane arrangement an antenna elements generate additional gain up to 10.2 dB with good radiation patterns as compared to the planar plane. The CSTMWS simulation software has been used for antenna structural design and parametric verification.
Recyclable waste separation system based on material classification using weight and size of waste Nur Shahida Midi; Muhammad Aizat Rahmad; Siti Hajar Yusoff; Sarah Yasmin Mohamad
Bulletin of Electrical Engineering and Informatics Vol 8, No 2: June 2019
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (906.185 KB) | DOI: 10.11591/eei.v8i2.1523

Abstract

Insufficient landfills problem had increased the needs to decrease the waste and recycling them. However, despite the efforts done by the government and local authorities on promoting recycling culture by introducing new laws and regulations, the awareness and willingness among the community is still low. One of the possible reasons to this is lack of effort to categorize the waste into the designated category which are paper, glass, plastic and metal. In order to address this problem, it is important to design a system that will ease the process of categorizing the waste. This can be achieve by the automation of the said process. In this work, a system consist of an algorithm and hardware to automatically categorize recyclable waste is proposed. The proposed system are utilizing weight sensor and ultrasonic sensors in order to capture the characteristics of the waste item, which are weight and size so that it can be categorized into paper, glass, plastic and metal. Here, a sytem to automatically separate household waste item is presented by combining an algorithm with a set of hardware consist of minimal number of sensors, conveyer belt and servor motors.
MM-PNEMO: a mathematical model to assess handoff delay and packet loss Shayla Islam; Aisha Hassan Abdalla Hashim; Mohammad Kamrul Hasan; Md. Abdur Razzaque
Bulletin of Electrical Engineering and Informatics Vol 8, No 2: June 2019
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (560.183 KB) | DOI: 10.11591/eei.v8i2.1525

Abstract

Wireless networks incorporate Mobile Nodes (MNs) that use wireless access networks to communicate. However, the communication among these MNs are not remained stable due to the poor network coverage during inter mobility. Moreover, the wireless nodes are typically small that results in resource-constrained. Thus, it is uphill to use algorithms having giant processing power or memory footprint. Accordingly, it is essential to check schemes consistently to evaluate the performance within the probable application scenario. To do so, numerical analysis could be a notable method to grasp the performance of mobility management schemes as well as the constraint of evolving mobility management solutions specifically for multi-interfaced MR in Proxy NEMO environment. This paper analyzes handoff performance by using a mathematical model of Multihoming-based scheme to support Mobility management in Proxy NEMO (MM-PNEMO) environment. Moreover, a comparative study has been made among the standard Network Mobility Basic Support Protocol (NEMO BSP), Proxy NEMO (PNEMO) and MM-PNEMO scheme respectively. The performance metrics estimated for these schemes are mainly handoff delay and packet loss. This paper also analysed the packet loss ratio and handoff gain as a function of cell radius, number of SMR and velocity respectively. It is apparent that, the MM-PNEMO scheme shows lower packet loss ratio (1%) compared to NEMO-BSP (11%) and P-NEMO (6%).
Energy efficient smart street light for smart city using sensors and controller Aziera Abdullah; Siti Hajar Yusoff; Syasya Azra Zaini; Nur Shahida Midi; Sarah Yasmin Mohamad
Bulletin of Electrical Engineering and Informatics Vol 8, No 2: June 2019
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (666.987 KB) | DOI: 10.11591/eei.v8i2.1527

Abstract

Smart street light is an intelligent control of street lights to optimize the problem of power consumption of the street, late in night. Conventional street lights are being replaced by Light Emitting Diode (LED) street lighting system, which reduces the power consumption. The focus of this project is to design a system of street lights controller to provide a reduction in power consumption. The prototype was designed by using Light Dependent Resistor (LDR), Infrared sensor (IR), battery and LED. The brightness of the lamps is being controlled in this project to reduce the power consumption. The dimming of the lamps depends on the speed of object motion detected such as pedestrians, cyclists and cars. The higher speed of moving object, the greater the level of intensity. For this idea, the innovation of street lights is not quite the same as conventional street lights that are controlled by timer switch or light sensor which automatically turns light on during sunset and off during sunrise. According to the study, motion detection devices may help to save up to 40% of energy per month.
Efficient FPGA implementation of high speed digital delay for wideband beamforming using parallel architectures Cardarilli, Gian Carlo; Nunzio, Luca Di; Fazzolari, Rocco; Giardino, Daniele; Matta, Marco; Re, Marco; Spanò, Sergio; Simone, Lorenzo
Bulletin of Electrical Engineering and Informatics Vol 8, No 2: June 2019
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (903.688 KB) | DOI: 10.11591/eei.v8i2.1483

Abstract

In this paper, the authors present an FPGA implementation of a digital delay for beamforming applications. The digital delay is based on a Parallel Farrow Filter. Such architecture allows to reach a very high processing rate with wideband signals and it is suitable to be used with Time-Interleaved Analog to Digital Converters (TI-ADC). The proposed delay has been simulated in MATLAB, implemented on FPGA and characterized in terms of amplitude and phase response, maximum clock frequency and area.

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