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Reducing No Booting Defects in IC SoC Functional Testing Using Six Sigma DMAIC: Evidence from PCBA Digital Test Stations Novian Hadinata; Mokh Suef
JTI: Jurnal Teknik Industri Vol 12 No 2 (2026): December 2026
Publisher : Universitas Islam Negeri Sultan Syarif Kasim Riau

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.24014/e7sn0n75

Abstract

The No Booting defect blocks functional verification of Integrated Circuit System on Chip (IC SoC) components during Printed Circuit Board Assembly (PCBA) testing. This study applies Six Sigma with the Define, Measure, Analyze, Improve, and Control (DMAIC) framework to reduce No Booting defects at the Digital Rights Management (DRM) and Digital Function Test (DFT) stations of PT XYZ, a television and monitor manufacturer. A Pareto analysis of the baseline data showed that No Booting accounted for 82.51% of all IC SoC defects, making it the dominant quality problem at these two stations. Root-cause analysis, combining a 6M fishbone diagram with Failure Mode and Effects Analysis (FMEA), ranked a thermal gap between the thermal pad and the heatsink on the test fixture as the leading risk (RPN = 720), ahead of any actual defect in the IC SoC itself. Direct temperature measurement confirmed that the fixture was overheating the component during testing, producing a false NG (Not Good) result rather than a true component failure. Correcting the thermal gap cut the defect rate by 83.40% and raised the process sigma level from 4.22 to 4.77, a statistically significant improvement. The case shows that a defect first classified as an IC SoC failure was, in this instance, caused by the test system rather than the component, and the corrective action was directed at the fixture rather than at replacing the chip.