Hassan, Turki Kahawish
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Experimental validation of quadratic-boost-zeta converter based on coat circuit Ali, Ahmed Mahmood; Hassan, Turki Kahawish
International Journal of Power Electronics and Drive Systems (IJPEDS) Vol 14, No 4: December 2023
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijpeds.v14.i4.pp2183-2194

Abstract

This work proposed a high step-up DC-DC converter with a voltage gain of 12 at a duty cycle of 48.25% with a single active switch. The new design combines the quadratic-boost converter and an isolated zeta converter with a single-stage coat circuit by a transformer with a trans ratio of 2.3. This can result in low voltage stress on switch and diodes with low conduction losses without using an additional clamp circuit, which in turn causes an increase in total efficiency. It has continuous and low ripples in the input and output currents. The voltage conversion ratio and the component voltage stresses are calculated in continuous conduction mode (CCM). The prototype was constructed and tested practically while considering an input voltage of 30 V, an input power of 240 W, an output voltage of 360 V, and a switching frequency of 100 kHz to validate the theoretical evaluations. The maximum efficiency at maximum output power is 94.5%.
Seventeen-level cascaded switched-capacitor multilevel inverter for grid-connected photovoltaic systems Naser, Maytham Jasim; Hassan, Turki Kahawish
International Journal of Power Electronics and Drive Systems (IJPEDS) Vol 16, No 2: June 2025
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijpeds.v16.i2.pp1070-1082

Abstract

This paper proposes a single-phase photovoltaic (PV) multi-array single DC bus seventeen-level cascaded switched capacitor multi-level inverter (CSC-MLI). Two boost converters are employed to extract maximum power, one for each PV string, and the output of each boost converter is connected to a single DC bus collector. A new 17-level CSC-MLI topology has been proposed to produce seventeen output voltage levels with a boosting ability of 2 times and the capability of limiting the capacitors' inrush current during the capacitors' charging mode. The topology offers a lower total standing voltage (TSV) of 16.5 as well as utilizes a lower number of components compared to conventional inverters. A total harmonic distortion (THD) of only 8.12% is present in the output voltage waveform, which yields a high-quality injected grid current through a simple filter with a THD of 1.18%. This design utilizes the switched-capacitor technique and has a self-voltage balancing feature. A novel hybrid-PWM technique has been implemented on CSC-MLI with a switching frequency of 2.5 kHz. The topology of the 3 kW single-phase 17-level inverter demonstrated commendable steady-state and dynamic performance across a range of test conditions by using MATLAB/Simulink software.