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Youssef Ahmed Mobarak
King Abdulaziz University
Computer Science & IT Earth & Planetary Sciences Electrical & Electronics Engineering Environmental Science Materials Science & Nanotechnology Mathematics Physics

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Voltage Instability of Initiation Fault Duration as Influenced by Nodes Short Circuit Levels NSCL with Different Types of Loads Youssef Ahmed Mobarak; Mahmoud M. Hussein
International Journal of Electrical and Computer Engineering (IJECE) Vol 6, No 3: June 2016
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (1526.926 KB) | DOI: 10.11591/ijece.v6i3.pp1305-1318

Abstract

The occurrence of voltage instabilities or voltage collapses depend on the duration of the persistence of the fault and on the type of fault, some faults lead to voltage instabilities, others lead to voltage collapse. Evaluation of fault durations causing occurrence of voltage instabilities is the main goal of this paper. This paper searches for the effect of nodes short circuit levels NSCL and its duration periods initiation of voltage instability, with lagging and leading load power factors at certain loads buses. In this paper, the power system dynamic simulation program is developed for dynamic analysis of voltage stability. This paper is concerned with the fault duration which lead to the occurrence of voltage instability phenomena due to NSCL. The fault which lead to voltage instability is found to be short circuits at certain nodes cleared without any variation in the transmission system elements, i.e. the post-fault conditions will be the same as the pre-fault conditions. Models for loads considered in this study are induction motors with three different shaft mechanical loads, constant impedance CZ loads, constant current CI loads and constant power CP loads are used, as they depict the behavior of most power system loads. The influence of the transmission network impedances, which are nearly the inverse of the NSCL, on the fault duration which lead to the occurrence of voltage instabilities are studied and evaluated using various load representations.
Effect of Novel Nanocomposite Materials for Enhancing Performance of Thin Film Transistor TFT Model Youssef Ahmed Mobarak; Moamen Atef
International Journal of Advances in Applied Sciences Vol 5, No 1: March 2016
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (983.837 KB) | DOI: 10.11591/ijaas.v5.i1.pp1-12

Abstract

The potential impact of high permittivity gate dielectrics on thin film transistors short channel and circuit performance has been studied using highly accurate analytical models. In addition, the gate-to-channel capacitance and parasitic fringe capacitances have been extracted. The suggested model in this paper has been increased the surface potential and decreased the threshold voltage, whenever the conventional silicon dioxide gate dielectric is replaced by high-K gate dielectric novel nanocomposite PVP/La2O3Kox=25. Also, it has been investigated that a decrease in parasitic outer fringe capacitance and gate-to-channel capacitance, whenever the conventional silicon nitride is replaced by low-K gate sidewall spacer dielectric novel nanocomposite PTFE/SiO2Ksp=2.9. Finally, it has been demonstrated that using low-K gate sidewalls with high-K gate insulators can be decreased the gate fringing field and threshold voltage. In addition, fabrication of nanocomposites from polymers and nano-oxide particles found to have potential candidates for using it in a wide range of applications in low cost due to low process temperature of these nanocomposites materials.
Co-Authors Mahmoud M. Hussein Moamen Atef