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Mohamad Kadim Suaidi
Universiti Teknikal Malaysia Melaka
Computer Science & IT Electrical & Electronics Engineering

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Journal : International Journal of Electrical and Computer Engineering

 1 
Design and Analysis High Gain PHEMT LNA for Wireless Application at 5.8 GHz Kamil Pongot; Abdul Rani Othman; Zahriladha Zakaria; Mohamad Kadim Suaidi; Abdul Hamid Hamidon; J.S. Hamidon; Azman Ahmad
International Journal of Electrical and Computer Engineering (IJECE) Vol 5, No 3: June 2015
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (545.921 KB) | DOI: 10.11591/ijece.v5i3.pp611-620

Abstract

This research present a design of a higher  gain (66.38dB) for PHEMT LNA  using an inductive drain feedback technique for wireless application at 5.8GHz. The amplifier it is implemented using PHEMT FHX76LP transistor devices.  The designed circuit is simulated with  Ansoft Designer SV.  The LNA was designed using  T-network as a matching technique was used at the input and output terminal,  inductive generation to the source and an inductive drain feedback. The  low noise amplifier (LNA) using lumped-component provides a noise figure 0.64 dB and a gain (S21) of 68.94 dB. The output reflection (S22), input reflection (S11) and return loss (S12) are -17.37 dB, -15.77 dB and -88.39 dB respectively. The measurement shows the  stability was at  4.54 and 3-dB bandwidth of 1.72 GHz. While, the  low noise amplifier (LNA) using  Murata manufactured component provides a noise figure 0.60 dB and a gain (S21) of 66.38 dB. The output reflection (S22), input reflection (S11) and return loss (S12) are -13.88 dB, -12.41 dB and -89.90 dB respectively. The measurement shows the  stability was at  6.81 and 3-dB bandwidth of 1.70 GHz. The input sensitivity more than -80 dBm  exceeded the standards required by IEEE 802.16.
Characterization of electrostatic discharge threshold voltage of phase-shift mask reticle Harriman Razman; Azmi Awang Md Isa; Mohamad Kadim Suaidi; Mohd Azizi Chik
International Journal of Electrical and Computer Engineering (IJECE) Vol 12, No 2: April 2022
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijece.v12i2.pp1265-1273

Abstract

A reticle is a stencil used in lithography process for forming integrated circuit (IC) on silicon substrate. It consists of a thin (100 nm) coating of masking metallic patterned (features) with critical dimension (CD) of nanometers on a thicker quartz substrate. The features can be damaged by electrostatic discharge (ESD) when exposed to the environment electrostatic charge and caused deformed IC and eventually device difunctional. Semiconductor equipment materials industry (SEMI) standard established the allowable electrostatic charge on reticle based on the characterization of ESD threshold voltage on binary reticle. However, there is another type of reticle which is phase-shift mask (PSM), has not been characterized for its ESD threshold voltage. A direct current (DC) voltage is applied directly to the structures with CD of 80 nm, 110 nm, and 160 nm. The surface current is recorded at all levels of stress from 1 to 100 V. The current–voltage (IV) curve and physical inspection results for each cell are then reviewed and classified. The results yielded which no electric field induced migration (EFM) defect and breakdown voltage occurred at any of the structures. The cathode’s metal work function has been identified as the factor that influences the PSM reticle ESD threshold voltage.
Co-Authors Abdul Hamid Hamidon Abdul Rani Othman Azman Ahmad Azmi Awang Md Isa Harriman Razman J.S. Hamidon Kamil Pongot Mohd Azizi Chik Zahriladha Zakaria