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Ab Al-Hadi Ab Rahman
Universiti Teknologi Malaysia, Malaysia
Computer Science & IT Electrical & Electronics Engineering

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VLSI Design of a Fast Pipelined 8x8 Discrete Cosine Transform Nurulnajah Mohd Zabidi; Ab Al-Hadi Ab Rahman
International Journal of Electrical and Computer Engineering (IJECE) Vol 7, No 3: June 2017
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (623.494 KB) | DOI: 10.11591/ijece.v7i3.pp1430-1435

Abstract

This paper presents a Very Large Scale Integrated (VLSI) design and implementation of a fixed-point 8x8 multiplierless Discrete Cosine Transform (DCT) using the ISO/IEC 23002-2 algorithm. The standard DCT algorithm, which is mainly used in image and video compression technology, consists of only adders, subtractors, and shifters, therefore making it efficient for hardware implementation. The VLSI implementation of the algorithm given in this paper further enhances the performance of the transform unit. Furthermore, circuit pipelining has been applied to the base design of the DCT, which significantly improves the performance by reducing the longest path in the non-pipeline design. The DCT has been implemented using semi-custom VLSI design methodology using the TSMC 0.13um process technology. Results show that our DCT designs can run up to around 1.7 Giga pixels/s, which is well above the timing required for real-time ultra-high definition 8K video.
Co-Authors Nurulnajah Mohd Zabidi