Article Per Year (5 Year)
p-Index From 2021 - 2026
0.408
P-Index
This Author published in this journals
All Journal International Journal of Electrical and Computer Engineering Bulletin of Electrical Engineering and Informatics
Likhitha Ramalingappa
Sri Krishna Institute of Technology
Computer Science & IT Electrical & Electronics Engineering

Published : 2 Documents Claim Missing Document
Claim Missing Document
Check
Articles

Found 2 Documents
Search

 1 
Power quality event classification using complex wavelets phasor models and customized convolution neural network Likhitha Ramalingappa; Aswathnarayan Manjunatha
International Journal of Electrical and Computer Engineering (IJECE) Vol 12, No 1: February 2022
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijece.v12i1.pp22-31

Abstract

Origin and triggers of power quality (PQ) events must be identified in prior, in order to take preventive steps to enhance power quality. However it is important to identify, localize and classify the PQ events to determine the causes and origins of PQ disturbances. In this paper a novel algorithm is presented to classify voltage variations into six different PQ events considering the space phasor model (SPM) diagrams, dual tree complex wavelet transforms (DTCWT) sub bands and the convolution neural network (CNN) model. The input voltage data is converted into SPM data, the SPM data is transformed using 2D DTCWT into low pass and high pass sub bands which are simultaneously processed by the 2D CNN model to perform classification of PQ events. In the proposed method CNN model based on Google Net is trained to perform classification of PQ events with default configuration as in deep neural network designer in MATLAB environment. The proposed algorithm achieve higher accuracy with reduced training time in classification of events than compared with reported PQ event classification methods.
Design of FFNN architecture for power quality analysis and its complexity challenges on FPGA Prathibha Ekanthaiah; Mesfin Megra; Aswathnarayana Manjunatha; Likhitha Ramalingappa
Bulletin of Electrical Engineering and Informatics Vol 11, No 2: April 2022
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/eei.v11i2.3293

Abstract

As we all know, power quality (PQ) issues are a major concern these days. Field programmable gate array (FPGA) are essential in PQ analysis, particularly in smart meters for data processing, storage, and transmission. One of the most significant advantages of FPGA is its reconfigurability, with vast hardware resources that can be used to implement complex as well as time-critical data processing units. Because the FPGA architecture supports fixed point arithmetic, data loss occurs in the data path unit, necessitating the realization of the PQ event detection module, and classification model to be more accurate than software implementation algorithms. The majority of the work reported, with feed forward neural network (FFNN) structure occupying large number of multipliers and adders for classification, most of the work reported has not addressed to minimize the data path resources for FFNN instead have addressed in improving classification accuracy. Based on these issues, this paper addresses the implementation challenges in FFNN architecture design by proposing improved and fast architectures. The proposed FFNN architecture design using optimum resources. The FFNN based classifier are designed to perform PQ event detection and classification with 99.5% accuracy. The FFNN processor operates at maximum frequency of 238 MHz.
Co-Authors Aswathnarayan Manjunatha Aswathnarayana Manjunatha Mesfin Megra Prathibha Ekanthaiah