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Design and Implementation of Real Time Charging Optimization for Hybrid Electric Vehicles K. Ramesh; C. Bharatiraja; S. Raghu; G. Vijayalakshmi; PL. Sambanthan
International Journal of Power Electronics and Drive Systems (IJPEDS) Vol 7, No 4: December 2016
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (515.765 KB) | DOI: 10.11591/ijpeds.v7.i4.pp1261-1268

Abstract

Electric vehicle (EV) has gained incredible interest from the past two decade as one of the hopeful greenhouse gasses solution. The number of Electric Vehicle (EV) is increasing around the world; hence that making EVs user friendly becomes more important. The main challenge in usage of EV is the charging time required for the batteries used in EV. As a consequence, this subject matter has been researched in many credentials where a wide range of solutions have been proposed. However those solutions are in nature due to the complex hardware structure. To provide an unswerving journey an Android application based charging optimization is proposed. This application is aimed at giving relevant information about the EV’s battery state of charge (SOC), accurate location of the EV, booking of the charging slots using token system and route planner. At emergency situations, an alternative service is provided by mobile charging stations. Route planner indicates the temperature by which prediction of reaching the destination can be done. In addition to that nearest places such as parks, motels are indicated. The estimated time and distance between the electric vehicle and the charging station is calculated by the charging station server according to which the parking lot is allocated. Vehicle to charging station communication is established for the time estimation of charging. This will help the EV users to know about charge status and charging station, which support fast charging method and availability of the station on the go and also when to charge their EV. The Arduino UNO board has been used for the hardware part. The hardware results are confirming the conceptual of the proposed work.
A PWM Strategies for Diode Assisted NPC-MLI to Obtain Maximum Voltage Gain for EV Application C. Bharatiraja; Shri Harish; J L Munda; P. Sanjeevikumar; M. Sriram Kumar; Vivek Bhati
International Journal of Power Electronics and Drive Systems (IJPEDS) Vol 8, No 2: June 2017
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (664.059 KB) | DOI: 10.11591/ijpeds.v8.i2.pp767-774

Abstract

The projected diode assisted Neutral Point Diode Clamed (NPC-MLI) with the photovoltaic system produces a maximum voltage gain that is comparatively higher than those of other boost conversion techniques. This paper mainly explores vector selection approach pulse-width modulation (PWM) strategies for diode-assisted NPC-MLI to obtain a maximum voltage gain without compromising in waveform quality. To obtain a high voltage gain maximum utilization of dc-link voltage and stress on the power switches must be reduced. From the above issues in the diode assisted NPC-MLI leads to vector selection approach PWM technique to perform capacitive charging in parallel and discharging in series to obtain maximum voltage gain. The operation principle and the relationship of voltage gain versus voltage boost duty ratio and switching device voltage stress versus voltage gain are theoretically investigated in detail. Owing to better performance, diode-assisted NPC-MLI is more promising and competitive topology for wide range dc/ac power conversion in a renewable energy application. Furthermore, theoretically investigated are validated via simulation and experimental results.
Investigation of the Common Mode Voltage for a Neutral-Point-Clamped Multilevel Inverter Drive and its Innovative Elimination through SVPWM Switching-State Redundancy C. Bharatiraja; J.L. Munda; N. Sriramsai; T Sai Navaneesh
International Journal of Power Electronics and Drive Systems (IJPEDS) Vol 7, No 3: September 2016
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijpeds.v7.i3.pp892-900

Abstract

The purpose of this paper is to provide a comprehensive Investigations and its control on the common mode Voltage (CMV) of the three-phase three-level neutral-point diode-clamped (NPC) multilevel inverter (MLI). A widespread space-vector pulse width modulation (SVPWM) technique to mitigate the perpetual problem of the NPC-MLI, the CMV, proposed. The proposed scheme is an effectual blend of nearest three vector (NTV) and selected three vector (STV) techniques. This scheme is capable to reduce the CMV without compromise the inverter output voltage and Total harmonics distraction (THD). CMV reduction achieved less than +Vdc/6 using the proposed vector selection procedure. The theoretical Investigations, the MATLAB software based computer simulation and Field Programmable Gate Array (FPGA) supported hardware corroboration have shown the superiority of the proposed technique over the conventional SVPWM schemes.
Low cost Real Time Centralized Speed Control of DC Motor Using Lab view -NI USB 6008 C. Bharatiraja; JL Munda; Ishan Vaghasia; Rajesh Valiveti; P. Manasa
International Journal of Power Electronics and Drive Systems (IJPEDS) Vol 7, No 3: September 2016
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijpeds.v7.i3.pp656-664

Abstract

The DC motors an outstanding portion of apparatus in automotive and automation industrial applications requiring variable speed and load characteristics due to its ease of controllability. Creating an interface control system for multi DC motor drive operations with centralized speed control, from small-scale models to large industrial applications much demand. By using Lab VIEW (laboratory virtual instrument engineering workbench) as the motor controller, can control a DC motor for multiple purposes using single software environment. The aim of this paper is to propose the centralized speed control of DC motor using Lab VIEW. Here, the Lab VIEW is used for simulating the motor, whereas the input armature voltage of the DC motor is controlled using a virtual Knob in Lab VIEW software. The hardware part of the system (DC motor) and the software (in personal computer) are interfaced using a data acquisition card (DAQ) -Model PCI- 6024E. The voltage and Speed response is obtained using LABVIEW software. Using this software, group of motors’ speed can be controlled from different location using remote telemetry. The propose work also focuses on controlling the speed of the individual DC motor using PWM scheme (Duty cycle based Square wave generation) and DAQ. Help of the DAQ along with Lab VIEW front panel window, the DC motor speed and directions can be change easily in remote way. In order to test the proposed system the laboratory model for an 80W DC motor group (multi drive) is developed for different angular displacements and directions of the motor. The simulation model and experimental results conforms the advantages and robustness of the proposed centralized speed control.
Carrier Shifting Algorithms for the Mitigation of Circulating Current in Diode Clamped MLI fed Induction Motor Drive C. Santhakumar; R. Shivakumar; C. Bharatiraja; P. Sanjeevikumar
International Journal of Power Electronics and Drive Systems (IJPEDS) Vol 8, No 2: June 2017
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijpeds.v8.i2.pp844-852

Abstract

Reduction of circulating current is one of the major considerations in inverter fed electrical drives. Diode clamped MLI enables higher output current per phase, thereby rating of the drive gets increased effectively. Various methods of triggering in the inverter legs creates better voltage profile and leads to the enabling of circulating current in the drive system.  The induced circulating current flows through the apparatus neutral (N) and supply ground (G) is caused by the existence of parasitic capacitance. This circulating current may cause potential danger especially when parasitic capacitance poses large. In the past, different modulation techniques and conversion topologies have been introduced to minimize the flow of circulating current. However, these techniques lead to complexity, high cost, low voltage profile and efficiency due to lower modulation parameters. This paper proposes PS, POD, PD carrier shifting PWM algorithms for diode clamped MLI to tumbling the circulating current within the each phase of inverter legs. The performances of proposed algorithm, in terms of circulating current, THD, losses and efficiencies are analyzed theoreticallyand are validated via simulation and experimental results.
Investigation of Slim Type BLDC Motor Drive with Torque Ripple Minimization using Abridged Space-Vector PWM Control Method C. Bharatiraja; Shyam Babu; V. Krishnakumar; P. Sanjeevikumar; Nixon George
International Journal of Power Electronics and Drive Systems (IJPEDS) Vol 8, No 2: June 2017
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijpeds.v8.i2.pp593-600

Abstract

Brushless DC (BLDC) motors are becoming an increasingly popular motor of choice for its unique characteristics. The BLDC motor drive is assumed to have trapezoidal back-electromotive force (EMF), rectangular phase currents and together produces the desired torque. However, practical back-EMF waveform might not be exactly trapezoidal because of current ripple, design considerations and manufacturing limitations. The adverse effect is the torque ripple generated due to the current ripple that causes mechanical vibration, acoustic noise and affects the accuracy of speed and position control which is not desirable in motor operation. In this paper an algorithm is developed to control and minimize the generated torque ripple using Space Vector Pulse Width Modulation (SVPWM) scheme. The efficiency improvement of slim type BLDC motor is confirmed using MATLAB environment and low cost TI Piccolo F28035 microcontroller (MC).
Analysis, Design and Investigation on a New Single-Phase Switched Quasi Z-Source Inverter for Photovoltaic Application C. Bharatiraja; P. Sanjeevikumar; Aganti Mahes; Ayushi Saxena; K. Padmapriya; B. K. Mithra; AS Swathimala; S. Raghu
International Journal of Power Electronics and Drive Systems (IJPEDS) Vol 8, No 2: June 2017
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (376.571 KB) | DOI: 10.11591/ijpeds.v8.i2.pp853-860

Abstract

This paper addresses the approach to improve the efficiency of the quasi  Z-source inverter. In order to increase the efficiency the reduction of conduction losses is one way to approach. Sequentially to decrease the conduction losses in the quasi z-source inverter the replacement of diode is replacing with switches is proposed which is also called as synchronous rectification. The paper represents basics of the approach, analysis  and comparison of the power losses of the traditional and proposed designs of the grid connected PV-system with quasi z-source inverter system. The proposed approach validated on the computer simulations in the MATLAB environment.
Real Time Power Quality Phenomenon for Various Distribution Feeders C. Bharatiraja; Harish Chowdary V
Indonesian Journal of Electrical Engineering and Computer Science Vol 3, No 1: July 2016
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijeecs.v3.i1.pp10-16

Abstract

Power Quality (PQ) brings more challenges to the large- scale and medium scale industries because in the recent years most of them use high efficiency and low energy devices which cause vulnerable PQ disturbances at Point of Common Coupling (PCC). In this paper, the measurement at different times during load condition and analysis of all types of disturbances occurred has been done. When large rated equipments run, the disturbance (harmonics, RMS variations, and switching transients) levels are very high and poor power factor (PF) has also appeared. Due to this poor PF, reactive power consumption in load increases and accordingly total power increases. An electronic device such as LED lights, fluorescent lamps, computers, copy machines, and laser printers also disturb the supply voltage. We are very well known that every PQ problem directly or indirectly must affect economically. Many researchers have investigated PQ audit for over three decades. However these studies and analysis have been done only at simulation level. Hence, the PQ analyzer based study is required to find out the PQ issues at distribution feeders. It will be a valuable guide for researchers, who are interested in the domain of PQ and wish to explore the opportunities offered by these techniques for further improvement in the field of PQ. This paper gives a brief Real Time PQ measurement using PQ analyzer HIOKI PW3198 at Distribution Feeders and it gives an idea to the researcher to optimize problems-related to PQ with respect to the high rated and low rated electric machinery of different feeders at PCC level. This study further extends to analyze the grid disturbances and looks forward to the optimization methods for each individual PQ disturbance.