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All Journal International Journal of Power Electronics and Drive Systems (IJPEDS)
Mohd Zaki Daud
Universiti Teknologi Malaysia
Control & Systems Engineering Electrical & Electronics Engineering

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The performances of partial shading adjuster for improving photovoltaic emulator Razman Ayop; Chee Wei Tan; Syed Norazizul Syed Nasir; Mohd Zaki Daud; Lau Kwan Yiew; Norjulia Mohamad Nordin; Abba Lawan Bukar
International Journal of Power Electronics and Drive Systems (IJPEDS) Vol 13, No 1: March 2022
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijpeds.v13.i1.pp528-536

Abstract

A photovoltaic (PV) emulator (PVE) is essential equipment for the research and diagnostic of PV generation. It is a convenient, highly efficient, and low-cost approach when compared to controllable light sources. Nonetheless, the implementation of the partial shading capability in a PVE is highly limited in terms of efficiency, computation burned, number of power converters, and flexibility to change in the ambient condition. This paper proposes a partial shading adjuster for a PVE that can overcome the aforementioned limitations. The adjuster is applicable to the conventional PVE since it is based on an algorithm that can be added to the controller of the PVE. By adding the adjuster, the conventional PVE can emulate partial shading. The partial shading adjuster is added into a PVE that uses the direct referencing control strategy with the buck controller regulated by the proportional-integral controller. The results show that the PVE maintains its accuracy and produces a stable output voltage and current during the load changes when the adjuster is added. In conclusion, the proposed partial shading adjuster able to improve th
Seven Levels Symmetric H-bridge Multilevel Inverter with Less Number of Switching Devices Megat Azahari Chulan; Mohd Junaidi Abdul Aziz; Abdul Halim Mohammed Yatim; Mohd Zaki Daud
International Journal of Power Electronics and Drive Systems (IJPEDS) Vol 8, No 1: March 2017
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijpeds.v8.i1.pp109-116

Abstract

This paper proposes a new topology of a cascaded multilevel inverter that utilises less number of switches than the conventional topology. The proposed topology maintains the performance of conventional 7-levels output multilevel inverter while reducing the loss of power, installation area, converter size as well as development cost. The circuit development consists of six switches and one diode. With less number of switching devices in the circuit, there will be a reduction in the gate driver circuits and also in effect fewer switches required for specific intervals of time. Simulation works have been conducted to validate the proposed MLI topology. It is envisaged that the proposed topology can be applied for the system that requires high efficiency and a low electromagnetic interference.
Co-Authors Abba Lawan Bukar Abdul Halim Mohammed Yatim Chee Wei Tan Lau Kwan Yiew Megat Azahari Chulan Mohd Junaidi Abdul Aziz Norjulia Mohamad Nordin Razman Ayop Syed Norazizul Syed Nasir