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All Journal International Journal of Power Electronics and Drive Systems (IJPEDS)
Taha Ahmed Hussein
Northern Technical University
Control & Systems Engineering Electrical & Electronics Engineering

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Multilevel level single phase inverter implementation for reduced harmonic contents Taha Ahmed Hussein
International Journal of Power Electronics and Drive Systems (IJPEDS) Vol 12, No 1: March 2021
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijpeds.v12.i1.pp314-324

Abstract

Selective harmonic elimination technique SHE is adopted in this work to reduce the harmonic contents in single phase cascaded multilevel inverter. The firing instants for the electronic switches MOSFETs in the inverter are calculated off line for five level to thirteen level inverter. An Arduino microcontroller is programmed to cope with different topologies of the multilevel inverter. The implemented multi-level (MLI) inverter results are compared with Simulink simulation program and are found very close to each other. SHE technique works at system frequency (50 Hz or 60 Hz) and the switching losses are very small. The sinusoidal pulse width modulation SPWM requires a carrier frequency not less 20 times the system frequency so SHE approach is found to be superior compared with SPWM. Also, SHE technique shows significant reduction in THD as the number of levels increased. Results for the output voltages and currents along with their frequency spectrum are shown and compared with traditional SPWM.
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