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All Journal International Journal of Power Electronics and Drive Systems (IJPEDS)
Kanike Vinod Kumar
Vellore Institute of Technology
Control & Systems Engineering Electrical & Electronics Engineering

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Real time simulation of reduced switch multilevel inverter with PWM switching sequence control Kanike Vinod Kumar; R. Saravana Kumar
International Journal of Power Electronics and Drive Systems (IJPEDS) Vol 12, No 4: December 2021
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijpeds.v12.i4.pp2305-2313

Abstract

Reduction of switch count in symmetrical and asymmetrical reduced switch multilevel inverter designs has been proposed regularly with operation of conventional carrier-based pulse width modulation technique. In this study, a novel structure of symmetrical Hexa shaped model reduced switch seven level output inverter is proposed without any auxiliary switch and H-bridge. Proposed structure offers a smaller number of switch count and voltage sources which results in the cost and complexity reduction of its implementation. To operate the switching sequence of inverter from carrier based alternative phase opposition disposition (APOD), phase opposition disposition (POD), and phase disposition (PD) methods, suitable logical expression to be realize which gained more prominence. Active utilization of two voltage sources in each mode of operation results in significant reduction of voltage stress across each switch is achieved. A comparative study of proposed multilevel inverters (MLI) with various reduced switch MLIs has been presented. Initially, simulation model implementation has been carried out with MATLAB/Simulink and observed the performance parameters and total harmonic distortion (THD). Simulation results are carried for the comparison of the results obtained in the real time work performed on OPAL-RT 5700 simulator.
Co-Authors R. Saravana Kumar