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All Journal International Journal of Power Electronics and Drive Systems (IJPEDS)
Pranupa S.
Ramaiah University of Applied Sciences
Control & Systems Engineering Electrical & Electronics Engineering

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Current mode control of single phase grid tie inverter with anti-islanding Sanjay Lakshminarayanan; Kiran Kumar B M; S. Nagaraja Rao; Pranupa S.
International Journal of Power Electronics and Drive Systems (IJPEDS) Vol 12, No 1: March 2021
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijpeds.v12.i1.pp241-248

Abstract

The aim of this paper is to explore the use of various current mode control (CMC) techniques to design a single phase grid tie inverter integrated with anti-islanding protection. Three types of CMC techniques have been discussed, namely current hysteresis control (CHC), constant frequency control (CFC) and average current mode control (ACMC). The performance of the grid tie inverter in the event of grid voltage failure is also studied to help install an anti-islanding mechanism. The proposed control techniques shall eliminate the use of Phase locked loop (PLL) control as the current reference is generated from the grid voltage itself. All three current mode control techniques of an inverter have been simulated in MATLAB/Simulink to evaluate the performance of the designed inverter. The simulated results show a current THD of less than 5% in all three methods and a good anti-islanding response.
Co-Authors Kiran Kumar B M S. Nagaraja Rao Sanjay Lakshminarayanan