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All Journal International Journal of Power Electronics and Drive Systems (IJPEDS)
Nur Ashida Salim
Universiti Teknologi MARA (UiTM)
Control & Systems Engineering Electrical & Electronics Engineering

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Multi-machine transient stability by using static synchronous series compensator Nur Ashida Salim; Nur Diyana Shahirah Mohd Zain; Hasmaini Mohamad; Zuhaila Mat Yasin; Nur Fadilah Ab Aziz
International Journal of Power Electronics and Drive Systems (IJPEDS) Vol 11, No 3: September 2020
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (908.605 KB) | DOI: 10.11591/ijpeds.v11.i3.pp1249-1258

Abstract

Transient stability in power system is vital to be addressed due to large disturbances that could damage the system such as load changes and voltage increases. This paper presents a multi-machine transient stability using the Static Synchronous Series Compensator (SSSC). SSSC is a device that is connected in series with the power transmission line and produces controllable voltage which contribute to a better performance in the power system stability. As a result, this research has observed a comparison of the synchronization of a three-phase system during single-phase faults before and after installing the SSSC device. In addition, this research investigates the ability of three different types of controllers i.e. Proportional Integral (PI), Proportional Integral Derivation (PID), and Generic controllers to be added to the SSSC improve the transient stability as it cannot operate by itself. This is because the improvement is too small and not able to achieve the desired output. The task presented is to improve the synchronization of the system and time taken for the voltage to stabilize due to the fault. The simulation result shows that the SSSC with an additional controller can improve the stability of a multi-machine power system in a single phase fault.
A new technique in reducing self-power consumption in the controller of off-grid solar home system Mohammad Shariful Islam; Siti Zaliha Mohammad Noor; Hasmaini Mohamad; Nur Ashida Salim; Zuhaila Mat Yasin
International Journal of Power Electronics and Drive Systems (IJPEDS) Vol 13, No 4: December 2022
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijpeds.v13.i4.pp2235-2243

Abstract

Reducing the self-power consumption of an off-grid solar home system is an economic model in which consumer employs photovoltaic (PV) system for its own electrical requirements. The latch-based clock gating approach has been employed in existing solar charge controllers to reduce integrated circuit (IC) power being used in the low-powered intended mode, although the reducing power is limited. This paper presents a self-power reduction technique based on wake-up power and latch-hold time; which minimize power supply during idle time for a solar home system. Wake-up power introduces a push-switch mechanism using typical transistor technology. Latch-hold time function is designed using an operational amplifier and negative-positive-negative (NPN) transistor. A technique with dynamic self-supply mechanism is also introduced for decreasing self-power consumption. The self-power consumption is identified via simulation studies where the result shows that the power usage is 70% lower than traditional approaches. This is determined using a simulated wave-shape analysis.
Co-Authors Hasmaini Mohamad Mohammad Shariful Islam Nur Diyana Shahirah Mohd Zain Nur Fadilah Ab Aziz Siti Zaliha Mohammad Noor Zuhaila Mat Yasin