Yan Chiew Wong
Universiti Teknikal Malaysia Melaka (UTeM)

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3.3V DC output at -16dBm sensitivity and 77% PCE rectifier for RF energy harvesting Astrie Nurasyeila Fifie Asli; Yan Chiew Wong
International Journal of Power Electronics and Drive Systems (IJPEDS) Vol 10, No 3: September 2019
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijpeds.v10.i3.pp1398-1409

Abstract

This paper presents a high voltage conversion at high sensitivity RF energy harvesting system for IoT applications. The harvesting system comprises bulk-to-source (BTMOS) differential-drive based rectifier to produce a high efficiency RF energy harvesting system. Low-pass upward impedance matching network is applied at the rectifier input to increase the sensitivity and output voltage. Dual-oxide-thickness transistors are used in the rectifier circuit to maintain the power efficiency at each stage of the rectifier. The system is designed using 0.18µm Silterra RF in deep n-well process technology and achieves 4.07V output at -16dBm sensitivity without the need of complex auxiliary control circuit and DC-DC charge-pump circuit. The system is targeted for urban environment.
On-chip ultra low power optical wake-up receiver for wireless sensor nodes targeting structural health monitoring Chia Yee Saw; Yan Chiew Wong; Ser Lee Loh; Haoyu Zhang
TELKOMNIKA (Telecommunication Computing Electronics and Control) Vol 18, No 5: October 2020
Publisher : Universitas Ahmad Dahlan

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.12928/telkomnika.v18i5.13378

Abstract

Wireless sensor network (WSN) consists of distributed nodes deployed for monitoring the physical conditions and organizing collected data at the central control unit. Power consumption is the challenges in WSN as the network consists of wireless sensor nodes becomes denser. By utilizing WSN and visible light technology, a simple health monitoring system design can be approached that are smaller in size, faster and lower power consumption. This work focuses on design a low power optical wake-up receiver to reduce the energy consumption of each node in WSN. A wake-up receiver is designed to be always-on for detecting incoming signal and switches on the stand by protocol controller and WSN network for data transmission process. The characteristic of optical transmission and functional circuit of a wake-up receiver has been investigated. A low power optical wake-up receiver has been designed in 180nm Silterra CMOS process technology. The proposed wake-up receiver consumes only 443pW in standby mode and 1.89nW in active mode. The proposed optical wake-up receiver drastically reduces the power consumption by more than one third compared to other wake-up receivers which could be a milestone in the medical field if successfully conducted.
Low power wake-up receiver based on ultrasound communication for wireless sensor network Yan Chiew Wong; Szi Hui Tan; Ranjit Singh Sarban Singh; Haoyu Zhang; A. R. Syafeeza; N. A. Hamid
Bulletin of Electrical Engineering and Informatics Vol 9, No 1: February 2020
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (972.265 KB) | DOI: 10.11591/eei.v9i1.1654

Abstract

Wireless sensor network (WSN) consists of base stations and sensors nodes to monitor physical and environmental conditions. Power consumption is a challenge in WSN due to activities of nodes. High power consumption is required for the main transceiver in WSN to receive communication requests all the time. Hence, a low power wake-up receiver is needed to minimize the power consumption of WSN. In this work, a low power wake-up receiver using ultrasound data communication is designed. Wake-up receiver is used to detect wake-up signal to activate a device in WSN. Functional block modelling of the wake-up receiver is developed in Silterra CMOS 130nm process technology. The performance of the wake-up receiver has been analyzed and achieving low power consumption which is 22.45μW. A prototype to demonstrate a wireless sensor node with wake-up receiver has been developed incorporating both ultrasonic and RF for internal and external communication respectively. We achieve 99.97% of power saving for 10s operation in the experimental setup for the WSN with and without wake-up receiver. Wake-up receiver used in WSN save power and prolong the lifetime of batteries and thus extending the operational lifetime of WSN.
Neuromorphic solutions: digital implementation of bio-inspired spiking neural network for electrocardiogram classification Dze Rynn Chen; Yan Chiew Wong
Indonesian Journal of Electrical Engineering and Computer Science Vol 27, No 1: July 2022
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijeecs.v27.i1.pp528-537

Abstract

Conventional techniques of off-chip processing for wearable devices cause high hardware resource usage which leads to heat generation and increased power consumption. Hence, edge computing methods such as neuromorphic computing are considered the most promising modern technology to replace conventional processing. It is beneficial to employ neuromorphic processing in electrocardiogram (ECG) classification, enabling engineers to overcome the constraints of heat generation caused by hardware utilization. Thus, this work aims to investigate common building blocks in a spiking neural network (SNN), analyze the spike-based plasticity mechanism and implement ECG classification on a neuromorphic circuit. The MIT-BIH Arrhythmia database (MITDB) is preprocessed in MATLAB, then used to train and test an SNN designed for field programmable gate arrays (FPGA), employing spike-based plasticity and Izhikevich neurons. The behaviour of spike timing dependent plasticity (STDP) in a neuromorphic circuit is also visualized in this work. The state-of the-art performance of this work lies in providing a generic mechanism to adapt ECG classification into a neuromorphic solution, a non-Von Neumann architecture. The proposed digital design utilizes 1.058% of hardware resources on a Zedboard. Application-wise, this work provides a foundation for development of neuromorphic computing in wearable medical devices that perform continuous monitoring of ECG.