A. N. Kasiran
Faculty of Electrical and Electronic Engineering, Universiti Tun Hussein Onn Malaysia.

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A Study on 3-phase Interleaved DC-DC Boost Converter Structure and Operation for Input Current Stress Reduction M. A. Harimon; A. Ponniran; A. N. Kasiran; H. H. Hamzah
International Journal of Power Electronics and Drive Systems (IJPEDS) Vol 8, No 4: December 2017
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (561.023 KB) | DOI: 10.11591/ijpeds.v8.i4.pp1948-1953

Abstract

This paper analyses a 3-phase interleaved DC-DC boost converter for the conversion of low input voltage with high input current to higher DC output voltage. The operation of the 3-phase interleaved DC-DC boost converter with multi-parallel of boost converters is controlled by interleaved of switching signals with 120 degrees phase-shifted. Therefore, with this circuit configuraion, high input current is evenly shared among the parallel units and consequently the current stress is reduced on the circuit and semiconductor devices and contributes reduction of overall losses. The simulation and hardware results show that the current stress and the semiconductor conduction losses were reduced approximately 33% and 32%, respectively in the 3-phase interleaved DC-DC boost converter compared to the conventional DC-DC boost converters. Furthermore, the use of interleaving technique with continuous conduction mode on DC-DC boost converters is reducing input current and output voltage ripples to increase reliability and efficiency of boost converters.