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All Journal International Journal of Reconfigurable and Embedded Systems (IJRES)
Yap June Wai
Universiti Teknika Malaysia Melaka
Economics, Econometrics & Finance

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A scalable FPGA based accelerator for Tiny-YOLO-v2 using OpenCL Yap June Wai; Zulkanain Mohd Yussof; Sani Irwan Md Salim
International Journal of Reconfigurable and Embedded Systems (IJRES) Vol 8, No 3: November 2019
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (779.62 KB) | DOI: 10.11591/ijres.v8.i3.pp206-214

Abstract

Deep Convolution Neural Network (CNN) algorithm have recently gained popularity in many applications such as image classification, video analytic, object recognition and segmentation. Being compute-intensive and memory expensive, CNN computations are common accelerated by GPUs with high power dissipations. Recent studies show implementation of CNN on FPGA and it gain higher advantage in term of energy-efficient and flexibility over Software-configurable-GPUs. The proposed framework is verified by implement Tiny-YOLO-v2 on De1SoC. The design development in this project is HLS approach to ease effort from writing complex RTL codes and provide fast verification through emulation and profiling tools provided in the OpenCL SDK. To best of our knowledge, this is the first implementation of Tiny-YOLO-v2 CNN based object detection algorithm on a small scale De1SoC board using Intel FPGA SDK for OpenCL approach.
Co-Authors Sani Irwan Md Salim Zulkanain Mohd Yussof