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All Journal International Journal of Reconfigurable and Embedded Systems (IJRES)
Rashmi S. B.
Don Bosco Institute of Technology
Economics, Econometrics & Finance

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Design of a 60 GHz power amplifier in a 45nm CMOS Rashmi S. B.; Siva S. Yellampalli
International Journal of Reconfigurable and Embedded Systems (IJRES) Vol 8, No 1: March 2019
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (768.789 KB) | DOI: 10.11591/ijres.v8.i1.pp14-26

Abstract

This Paper presents a design and implementation of class-AB power amplifier which works at 60GHz unlicensed frequency band. This power amplifier uses a MOSFET from gpdk45 technology library. The design simulation is done by cadence Analog Design Environment. This proposed power amplifier yields a power added efficiency of 23.45% and a power gain S21 of 10dB at 60GHz. The output impedance of proposed power amplifier is needs to be matched with 73Ω antenna impedance. The S22 output matching of the simulated power amplifier is -18dB at 60GHz. The input side is matched to arbitrary impedance of 50Ω the resulting S11 of simulated result is noted to be -15dB at 60GHz. The proposed circuit has a noise figure of 3.85dB. The proposed circuit has a Pout-1dB of 8.5dBm. the designed class AB power amplifier is an important component in 60GHz transceiver. The layout of the associated circuit is drawn with the total size of 0.107um2.
Co-Authors Siva S. Yellampalli