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Ayyakrishnan M.
St.Joseph’s College of Engineering and Technology
Electrical & Electronics Engineering

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FPGA Based Fault Tolerant Scheme on Four Switch Voltage Source Inverter Ayyakrishnan M.
International Journal of Applied Power Engineering (IJAPE) Vol 4, No 3: December 2015
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (689.705 KB) | DOI: 10.11591/ijape.v4.i3.pp137-148

Abstract

This paper presents an efficient methodology to detect the fault occurrence and its tolerance of four switch voltage source inverter in a single Xilinx Spartan 3E Field   Pro-grammable Gate Array (FPGA). The merit of this proposed system reduces the time period between fault existence and its isolation with four switches in two legs instead of six switches in three legs so as to minimize the switching losses, accuracy, and better recovery time. The FPGA platform supports the run-time reconfiguration of control functions and algorithms directly in hardware and meets hard real-time performance criteria in terms of timings for SVPWM generation, fault detection time and fault tolerance time. Simulation and Experimental results of this proposed system is demonstrated and verified.
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