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All Journal Bulletin of Electrical Engineering and Informatics Bulletin of Electrical Engineering and Informatics Bulletin of Electrical Engineering and Informatics
N. Devarajan
Government College of Technology
Computer Science & IT Electrical & Electronics Engineering Engineering

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Reduction of Switches and DC Sources in Cascaded Multilevel Inverter N. Devarajan; A. Reena
Bulletin of Electrical Engineering and Informatics Vol 4, No 3: September 2015
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (269.695 KB) | DOI: 10.11591/eei.v4i3.501

Abstract

Harmonics and increasing number of switches and DC sources for increasing level is the major issue in the cascaded multilevel inverter for the application of medium and high voltage power system applications. In this paper several new techniques are used to reduce the switches and DC sources, which overcome the disadvantages of cascaded multilevel inverter. The THD values for various levels (seven and nine) are compared with and without PWM technique.
Reduction of Switches and DC Sources in Cascaded Multilevel Inverter N. Devarajan; A. Reena
Bulletin of Electrical Engineering and Informatics Vol 4, No 3: September 2015
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (269.695 KB) | DOI: 10.11591/eei.v4i3.501

Abstract

Harmonics and increasing number of switches and DC sources for increasing level is the major issue in the cascaded multilevel inverter for the application of medium and high voltage power system applications. In this paper several new techniques are used to reduce the switches and DC sources, which overcome the disadvantages of cascaded multilevel inverter. The THD values for various levels (seven & nine) are compared with and without PWM technique.
Reduction of Switches and DC Sources in Cascaded Multilevel Inverter N. Devarajan; A. Reena
Bulletin of Electrical Engineering and Informatics Vol 4, No 3: September 2015
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (269.695 KB) | DOI: 10.11591/eei.v4i3.501

Abstract

Harmonics and increasing number of switches and DC sources for increasing level is the major issue in the cascaded multilevel inverter for the application of medium and high voltage power system applications. In this paper several new techniques are used to reduce the switches and DC sources, which overcome the disadvantages of cascaded multilevel inverter. The THD values for various levels (seven & nine) are compared with and without PWM technique.
Co-Authors A. Reena