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Ali Hadizadeh
Digital Systems Group, EE Faculty, Sharif University of Technology, Tehran,
Environmental Science

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Parallel Processor Architecture with a New Algorithm for Simultaneous Processing of MIPS-Based Series Instructions Ali Hadizadeh; Ehsan Tanghatari
Emerging Science Journal Vol 1, No 4 (2017): December
Publisher : Ital Publication

Show Abstract | Download Original | Original Source | Check in Google Scholar | Full PDF (615.273 KB) | DOI: 10.28991/ijse-01126

Abstract

Processors are main part of the calculation and decision making of a system. Today, due to the increasing need of industry and technology to faster and more accurate computing power, design and manufacture of parallel processing units, has been very much considered. One of the most important processor families used in various devises is the MIPS processors. This processor family had been considered in the telecom and control industry as a reasonable choice. In this paper, new architecture based on this processor, with new parallel processing design, is provided to allow parallel execution of instructions dynamically. Ultimately, the processor efficiency to several fold will be increased. In this architecture, new ideas for the issuance of instructions in parallel, intelligent detection of conditional jumps and memory management are presented.
Co-Authors Ehsan Tanghatari