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All Journal International Journal of Electrical and Computer Engineering Indonesian Journal of Electrical Engineering and Computer Science
Anas Benslimane
University of Mohammed I
Computer Science & IT Electrical & Electronics Engineering

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Unbalance compensation topology for railway application based on pulse width modulation alternating current chopper Ismail Mir; Anas Benslimane; Jamal Bouchnaif; Badreddine Lahfaoui
Indonesian Journal of Electrical Engineering and Computer Science Vol 26, No 3: June 2022
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijeecs.v26.i3.pp1235-1246

Abstract

This paper focuses the study on the design of a new topology of unbalance compensators adopted by railway operators in the substations of high-speed railway lines, this compensation structure based on the concept of alternating current (AC)-chopper controlled impedance (CCI). The present document describes the CCI compensator in terms of the components constituting this structure, the installation of CCI to limit the unbalance factor according to the limit imposed by the moroccan energy provider (ONEE), and the calculation of the power losses generated by the CCI and the comparison with other topologies such as voltage source inverter STATCOM (VSI) and current source inverter STATCOM (CSI). The modelization of the compensator and the results were established using MATLAB/Simulink software by exploiting real data provided by the moroccan railway office (ONCF).
Single-phase transformerless inverter topologies at different levels for a photovoltaic system, with proportional resonant controller Lamreoua Abdelhak; Anas Benslimane; Bouchnaif Jamal; Mostafa El Ouariachi
International Journal of Electrical and Computer Engineering (IJECE) Vol 13, No 2: April 2023
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijece.v13i2.pp1410-1422

Abstract

In this paper, we have studied the topologies of single-phase transformerless inverters with different levels using a proportional-integral-resonant (PIR) AC controller, and the multi-level cascade inverter topology with sinusoidal pulse with modulation (SPWM) control in an open and closed loop. To ensure that these photovoltaic inverters can inject a defined amount of reactive power into the grid according to international regulations. Therefore, precise monitoring of the mains voltage vector by a phase-locked loop (PLL) system is applied to ensure the proper functioning of this system. For inverter topologies with less than three levels, the simulation results show that the highly efficient and reliable inverter concept (HERIC) topology performance is better than that of H5 and H6. On the other hand, the performance of the topology H6 ameliorate is superior to those of H4, H5, and HERIC in currents of leakage. On the other hand, for the control of cascaded multi-level closed-loop inverters, we notice that there is an improvement in the spectra and the elimination of all frequency harmonics, close to that of the fundamental, and a reduction in the rate of harmonic current distortion.
Co-Authors Badreddine Lahfaoui Bouchnaif Jamal Ismail Mir Jamal Bouchnaif Lamreoua Abdelhak Mostafa El Ouariachi