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All Journal Bulletin of Electrical Engineering and Informatics Indonesian Journal of Electrical Engineering and Computer Science
Nabihah Ahmad
Universiti Tun Hussein Onn Malaysia
Electrical & Electronics Engineering

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Low power design of ultra wideband PLL using 90 nm CMOS technology Fadhilah Binti Noor Al Amin; Nabihah Ahmad; Siti Hawa Ruslan
Indonesian Journal of Electrical Engineering and Computer Science Vol 20, No 2: November 2020
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijeecs.v20.i2.pp727-735

Abstract

The rapid growth of the electronic system has become one of the challenges in the high performance of very large scale integration (VLSI) design and has contributed to the evolution of phase locked loop (PLL) system design as one of the inevitable and significant necessities in the modern days. This design focus on the development of PLL system that can operate at a high performance within the ultra-wideband (UWB) frequency but consume low power that may be useful for future device implementation in the communication system. All proposed sub modules of PLL is highly suitable for low power and high speed application as each of them consumes overall power consumption around 2 µW until 1 mW with frequency from 3.1 GHz to 10.6 GHz. All the design architecture, schematic, simulation and analysis are implemented using Synopsys Tool in 90 nm CMOS technology. Through the overall analysis, it can be concluded that this proposed sub modules design of the PLL system has better performance compared to previous work in terms of power consumption and frequency.
Comparative study of symmetrical OTA performance in 180 nm, 130 nm and 90 nm CMOS technology Wan Mohammad Ehsan Aiman bin Wan Jusoh; Siti Hawa Ruslan; Nabihah Ahmad; Warsuzarina Mat Jubadi; Rahmat Sanudin
Indonesian Journal of Electrical Engineering and Computer Science Vol 14, No 1: April 2019
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijeecs.v14.i1.pp230-240

Abstract

In this paper, the comparative study of symmetrical Operational Transconductance Amplifier (OTA) performance between 180 nm, 130 nm and 90 nm CMOS technology have been done thoroughly to find the relationship between voltage supply and bias current with performance parameters (gain, power consumption and Common-Mode Rejection Ratio (CMRR)). The OTA which adopts symmetrical topology is designed carefully and simulated using Synopsys HSpice software and the results are carefully analyzed and compared. The symmetrical OTA designed in 90 nm CMOS technology is found to be the best because the power consumed is only 9.83 µW from ±0.9 V voltage supply and the OTA achieved 55.9 dB of the DC gain. The CMRR of the symmetrical 90 nm OTA is 140 dB which is sufficient to reject the common-mode signals in electrocardiogram (ECG) input signal. The symmetrical 90 nm OTA is suitable to be implemented as bioamplifier in ECG signal detection system as it consumed low power and has a high CMRR characteristic.
A review of the hardware implementation of CRYSTALS-Kyber post-quantum cryptography algorithm Ardhi Wijayanto; Nabihah Ahmad; Salman Ahmed
Bulletin of Electrical Engineering and Informatics Vol 15, No 2: April 2026
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/eei.v15i2.10477

Abstract

The development of quantum computing is escalating the vulnerability of conventional cryptography algorithms. To answer this challenge, researchers develop the post-quantum cryptography (PQC) algorithms. The PQC algorithms are immune from attacks deployed by quantum computers. CRYSTALS-Kyber (abbreviated as Kyber) is a PQC algorithm, originally constructed as public key encryption (PKE), then extended as the key encapsulation mechanism (KEM) algorithm to securely transfer a shared key to other parties over unsecured communication channels. The implementation of Kyber algorithm in hardware ensures a better security standard for securing systems that prioritize performance. This study provides a literature review of the Kyber hardware implementations. The review is delivered by a systematic literature review method to discuss resource and performance optimization, key design constraints, performance trade-offs, and future research directions in hardware implementation of Kyber based on existing studies. Area utilization and energy efficiency are achieved through the optimization of memory and architecture. The trade-off between performance, flexibility, and utilization remains relevant in the deployment context. Future work should accommodate holistic solutions, security, and performance enhancements as well as fabrication for real-world solutions.
Co-Authors Ardhi Wijayanto Fadhilah Binti Noor Al Amin Rahmat Sanudin Salman Ahmed Siti Hawa Ruslan Wan Mohammad Ehsan Aiman bin Wan Jusoh Warsuzarina Mat Jubadi