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Murugesh V
King Khalid University

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FPGA Implementation of a Novel Gaussian Filter Using Power Optimized Approximate Adders Jamshid M Basheer; Murugesh V
Indonesian Journal of Electrical Engineering and Computer Science Vol 11, No 3: September 2018
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijeecs.v11.i3.pp1048-1059

Abstract

Smoothing filters are essential for noise removal and image restoration. Gaussian filters are used in many digital image and video processing systems. Hence the hardware implementation of the Gaussian filter becomes a reliable solution for real time image processing applications. This paper discusses the implementation of a novel Gaussian smoothing filter with low power approximate adders in Field Programmable Gate Array (FPGA). The proposed Gaussian filter is applied to restore the noisy images in the proposed system. Original test images with 512x512 pixels were taken and divided in to 4x4 blocks with 256x256 pixels. The proposed technique has been applied and the performance metrics were measured for various simulation criteria. The proposed algorithm is also implemented using approximate adders, since approximate adders had been recognized as a reliable alternate for error tolerant applications in circuit based metrics such as power, area and delay where the accuracy may be considered for trade off.
Co-Authors Jamshid M Basheer