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All Journal Indonesian Journal of Electrical Engineering and Computer Science
Sunitha Yariyur Narasimhaiah
SJB Institute of Technology

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Performance analysis of different intonation models in Kannada speech synthesis Sadashiva Veerappa Chakrasali; Krishnappa Indira; Sunitha Yariyur Narasimhaiah; Shadaksharaiah Chandraiah
Indonesian Journal of Electrical Engineering and Computer Science Vol 26, No 1: April 2022
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijeecs.v26.i1.pp243-252

Abstract

Text to speech (TTS) is a system that generates artificial speech from text input. The prosodic models used improve the quality of the synthesized speech especially naturalness and intelligibility. The prosody involves intonation, intonation refers to the variations in the pitch frequency (F0) with respect to time in an utterance. This work mainly concentrates on building feedback neural network model to predict F0 contour in the utterances using Fujisaki intonation model parameters as the input features to the network since the Fujisaki intonation model is data driven and not a rule based one. In this work we have built 4-layer feedback neural network in the festival framework. Finally, the synthetically generated Kannada speech using the neural network model, is compared for its performance with the classification and regression tree (CART) model and Tilt model. Database of simple declarative Kannada sentences created by Carnegie Mellon University have been deployed in this work. From the study it is very clear that F0 contours can be accurately predicted using CART and neural network models, whereas naturalness and intelligibility is high in CART model rather than neural network model.
Design and development of frameworks for CPU verification efficiency improvement Sheetal Singrihalli Hemaraj; Shylashree Nagaraja; Sunitha Yariyur Narasimhaiah; Madhu Patil
Indonesian Journal of Electrical Engineering and Computer Science Vol 32, No 3: December 2023
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijeecs.v32.i3.pp1361-1369

Abstract

Bug finding is a critical component of the verification flow and is resource intensive.In a typical week, a debug engineer writes triages, which take up significant amount of time that could be spent debugging another unique issue, and the lack of standardization in scripting causes maintainability issues in functional verification bug triage. A framework that allows customizable triage script generation is developed based on inputs from the engineer deploying YAML isn’t another markup language (YAML) files and practical extraction and report language (PERL) scripting, and this methodology is made automated and is standardized across projects to ensure maximum benefit going forward. The use of auto-triage in the project of functional verification bug triage has contributed to a 18% increase in triaged signatures on average, from 40% before its use to 58% after. A similar earlier project vs. current project comparison shows a 20% uplift. The triaged inputs that are parsed are currently being fed to a machine learning algorithm, which will help further improve the debug efficiency. As part of future work, the information from input YAML files can be used to analyze simulation failure attributes, hence improving the overall efficiency of debugging.
Co-Authors Krishnappa Indira Madhu Patil Sadashiva Veerappa Chakrasali Shadaksharaiah Chandraiah Sheetal Singrihalli Hemaraj Shylashree Nagaraja