Rajashree Narendra
Dayananda Sagar University

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Lifetime enhanced energy efficient wireless sensor networks using renewable energy Trupti Shripad Tagare; Rajashree Narendra
International Journal of Electrical and Computer Engineering (IJECE) Vol 13, No 3: June 2023
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijece.v13i3.pp3088-3098

Abstract

In this paper, we consider a remote environment with randomly deployed sensor nodes, with an initial energy of E0 (J) and a solar panel. A hierarchical clustering technique is implemented. At each round, the normal nodes send the sensed data to the nearest cluster head (CH) which is chosen on the probability value. Data after aggregation at CHs is sent to the base station (BS). CH requires more energy than normal nodes. Here, we energize only CHs if their energy is less than 5% of its initial value with the use of solar energy. We evaluate parameters like energy consumption, the lifetime of the network, and data packets sent to CH and BS. The obtained results are compared with existing techniques. The proposed protocol provides better energy efficiency and network lifetime. The results show increased stability with delayed death of the first node. The network lifetime of the proposed protocol is compared to the multi-level hybrid energy efficient distributed (MLHEED) technique and low-energy adaptive clustering hierarchy (LEACH) variants. Network lifetime is enhanced by 13.35%. Energy consumption is reduced with respect to MLHEED-4, 5, and 6 by 7.15%, 12.10%, and 14.975% respectively. The no. of packets transferred to the BS is greater than the MLHEED protocol by 39.03%.
An efficient ultra-wideband digital transceiver for wireless applications on the field-programmable gate array platform Santhosh Kumar Ramachandragowda; Devaraju Ramakrishna; Rajashree Narendra
International Journal of Electrical and Computer Engineering (IJECE) Vol 13, No 4: August 2023
Publisher : Institute of Advanced Engineering and Science

Show Abstract | Download Original | Original Source | Check in Google Scholar | DOI: 10.11591/ijece.v13i4.pp4432-4440

Abstract

The ultra-wideband (UWB) technology is a promising short-range communication technology for most wireless applications. The UWB works at higher frequencies and is affected by interferences with the same frequency standards. This manuscript has designed an efficient and low-cost implementation of IEEE 802.15.4a-based UWB-digital transceiver (DTR). The design module contains UWB transmitter (TX), channel, and UWB-receiver (RX) units. Convolutional encoding and modulation units like burst position modulation and binary phase-shift keying modulation are used to construct the UWB-TX. The synchronization and Viterbi decoder units are used to recover the original data bits and are affected by noise in UWB-RX. The UWB-DTR is synthesized using Xilinx ISE® environment with Verilog hardware description language (HDL) and implemented on Artix-7 field-programmable gate array (FPGA). The UWB-DTR utilizes less than 2% (slices and look-up table/LUTs), operates at 268 MHz, and consumes 91 mW of total power on FPGA. The transceiver achieves a 6.86 Mbps data rate, which meets the IEEE 802.15.4a standard. The UWB-DTR module obtains the bit error rate (BER) of 2×10-4 by transmitting 105 data bits. The UWB-DTR module is compared with similar physical layer (PHY) transceivers with improvements in chip area (slices), power, data rate, and BER.